Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as Cypress document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio. Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document. Future revisions will occur when appropriate, and any changes will be set out on the document history page. Continuity of ordering part numbers Infineon continues to support existing part numbers. Please continue to use the ordering part numbers listed in the datasheet for ordering. www.infineon.com PSoC 4: PSoC 4000S Datasheet Programmable System-on-Chip (PSoC ) Programmable System-on-Chip (PSoC) General Description PSoC 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm Cortex -M0+ CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The PSoC 4000S product family is a member of the PSoC 4 platform architecture. It is a combination of a microcontroller with standard communication and timing peripherals, a capacitive touch-sensing system (CapSense) with best-in-class performance, programmable general-purpose continuous-time and switched-capacitor analog blocks, and programmable connectivity. PSoC 4000S products will be upward compatible with members of the PSoC 4 platform for new applications and design needs. LCD Drive Capability Features LCD segment drive capability on GPIOs 32-bit MCU Subsystem 48-MHz Arm Cortex-M0+ CPU with single-cycle multiply Timing and Pulse-Width Modulation Up to 32 KB of flash with Read Accelerator Five 16-bit timer/counter/pulse-width modulator (TCPWM) Up to 4 KB of SRAM blocks Center-aligned, Edge, and Pseudo-random modes Programmable Analog Single-slope 10-bit ADC function provided by Capacitance Comparator-based triggering of Kill signals for motor drive and sensing block other high-reliability digital logic applications Two current DACs (IDACs) for general-purpose or capacitive Up to 36 Programmable GPIO Pins sensing applications on any pin 48-pin TQFP, 40-pin QFN, 32-pin QFN, 24-pin QFN, 32-pin Two low-power comparators that operate in Deep Sleep TQFP, and 25-ball WLCSP packages low-power mode Any GPIO pin can be CapSense, analog, or digital Programmable Digital Drive modes, strengths, and slew rates are programmable Programmable logic blocks allowing Boolean operations to be performed on port inputs and outputs PSoC Creator Design Environment Low-Power 1.71-V to 5.5-V Operation Integrated Development Environment (IDE) provides schematic design entry and build (with analog and digital Deep Sleep mode with operational analog and 2.5 A digital automatic routing) system current Applications Programming Interface (API) component for all Capacitive Sensing fixed-function and programmable peripherals Cypress CapSense Sigma-Delta (CSD) provides best-in-class Industry-Standard Tool Compatibility signal-to-noise ratio (SNR) (>5:1) and water tolerance After schematic entry, development can be done with Cypress-supplied software component makes capacitive Arm-based industry-standard development tools sensing design easy Automatic hardware tuning (SmartSense) Serial Communication Two independent run-time reconfigurable Serial Communication Blocks (SCBs) with re-configurable I2C, SPI, or UART functionality Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-00123 Rev. *L Revised July 31, 2019