Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as Cypress document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio. Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document. Future revisions will occur when appropriate, and any changes will be set out on the document history page. Continuity of ordering part numbers Infineon continues to support existing part numbers. Please continue to use the ordering part numbers listed in the datasheet for ordering. www.infineon.comPSoC 4: PSoC 4100S Datasheet Programmable System-on-Chip (PSoC) General Description PSoC 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm Cortex-M0+ CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The PSoC 4100S product family is a member of the PSoC 4 platform architecture. It is a combination of a microcontroller with standard communication and timing peripherals, a capacitive touch-sensing system (CapSense) with best-in-class performance, programmable general-purpose continuous-time and switched-capacitor analog blocks, and programmable connectivity. PSoC 4100S products are upward compatible with members of the PSoC 4 platform for new applications and design needs. Features 32-bit MCU Subsystem Timing and Pulse-Width Modulation 48-MHz Arm Cortex-M0+ CPU with single-cycle multiply Five 16-bit timer/counter/pulse-width modulator (TCPWM) blocks Up to 64 KB of flash with Read Accelerator Up to 8 KB of SRAM Center-aligned, Edge, and Pseudo-random modes Comparator-based triggering of Kill signals for motor drive and Programmable Analog other high-reliability digital logic applications Two opamps with reconfigurable high-drive external and Quadrature decoder high-bandwidth internal drive and Comparator modes and ADC input buffering capability. Opamps can operate in Deep Sleep Up to 36 Programmable GPIO Pins low-power mode. 12-bit 1-Msps SAR ADC with differential and single-ended 48-pin TQFP, 44-pin TQFP, 40-pin QFN, 32-pin QFN, and modes, and Channel Sequencer with signal averaging 35-ball WLCSP packages Single-slope 10-bit ADC function provided by a capacitance Any GPIO pin can be CapSense, analog, or digital sensing block Drive modes, strengths, and slew rates are programmable Two current DACs (IDACs) for general-purpose or capacitive sensing applications on any pin Clock Sources Two low-power comparators that operate in Deep Sleep 32-kHz Watch Crystal Oscillator (WCO) low-power mode 2% Internal Main Oscillator (IMO) Programmable Digital 32-kHz Internal Low-power Oscillator (ILO) Programmable logic blocks allowing Boolean operations to be ModusToolbox Software performed on port inputs and outputs Comprehensive collection of multi-platform tools and software Low-Power 1.71-V to 5.5-V Operation libraries Deep Sleep mode with operational analog and 2.5-A digital Includes board support packages (BSPs), peripheral driver system current library (PDL), and middleware such as CapSense Capacitive Sensing PSoC Creator Design Environment Cypress CapSense Sigma-Delta (CSD) provides best-in-class Integrated development environment (IDE) provides schematic signal-to-noise ratio (SNR) (>5:1) and water tolerance design entry and build, with analog and digital automatic routing Cypress-supplied software component makes capacitive Application programming interface (API) Components for all sensing design easy fixed-function and programmable peripherals Automatic hardware tuning (SmartSense) Industry-Standard Tool Compatibility LCD Drive Capability After schematic entry, development can be done with Arm-based industry-standard development tools LCD segment drive capability on GPIOs Serial Communication Three independent run-time reconfigurable Serial 2 Communication Blocks (SCBs) with re-configurable I C, SPI, or UART functionality Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-00122 Rev. *N Revised November 10, 2020