Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as Cypress document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio. Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document. Future revisions will occur when appropriate, and any changes will be set out on the document history page. Continuity of ordering part numbers Infineon continues to support existing part numbers. Please continue to use the ordering part numbers listed in the datasheet for ordering. www.infineon.com Automotive PSoC 4: PSoC 4100S Family Datasheet Programmable System-on-Chip (PSoC ) Automotive PSoC 4: PSoC 4100S Family Datasheet, Programmable System-on-Chip (PSoC) Functional Description PSoC 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm Cortex -M0+ CPU, while being AEC-Q100 compliant. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The PSoC 4100S product family is a member of the PSoC 4 platform architecture. It is a combination of a microcontroller with standard communication and timing peripherals, a capacitive touch-sensing system (CapSense) with best-in-class performance, programmable general-purpose continuous-time and switched-capacitor analog blocks, and programmable connectivity. PSoC 4100S products will be upward compatible with members of the PSoC 4 platform for new applications and design needs. LCD drive capability Features LCD segment drive capability on GPIOs Automotive Electronics Council (AEC) AEC-Q100 Qualified Serial communication 32-bit MCU subsystem Three independent run-time reconfigurable Serial Commu- 2 48-MHz Arm Cortex-M0+ CPU nication Blocks (SCBs) with re-configurable I C, SPI, UART Up to 64 KB of flash with Read Accelerator or LIN Slave functionality Up to 8 KB of SRAM Timing and pulse-width modulation Programmable analog Five 16-bit timer/counter/pulse-width modulator (TCPWM) blocks Two opamps with reconfigurable high-drive external and high-bandwidth internal drive and Comparator modes and Center-aligned, Edge, and Pseudo-random modes ADC input buffering capability. Opamps can operate in Deep Comparator-based triggering of Kill signals for motor drive Sleep low-power mode. and other high-reliability digital logic applications 12-bit 1-Msps SAR ADC with differential and single-ended Up to 34 programmable GPIO pins modes, and Channel Sequencer with signal averaging 28-pin SSOP, and 40-pin QFN packages Single-slope 10-bit ADC function provided by a capacitance sensing block Any GPIO pin can be CapSense, analog, or digital Two current DACs (IDACs) for general-purpose or capacitive Drive modes, strengths, and slew rates are programmable sensing applications on any pin PSoC Creator Design Environment Two low-power comparators that operate in Deep Sleep Integrated Development Environment (IDE) provides low-power mode schematic design entry and build (with analog and digital Programmable digital automatic routing) Programmable logic blocks allowing Boolean operations to Applications Programming Interface (API) component for all be performed on port inputs and outputs fixed-function and programmable peripherals Low-power 1.71-V to 5.5-V operation Industry-standard tool compatibility Deep Sleep mode with operational analog and 2.5- A digital After schematic entry, development can be done with system current Arm-based industry-standard development tools Capacitive sensing Temperature ranges Cypress CapSense Sigma Delta (CSD) provides A-Grade: 40 C to +85 C best-in-class signal-to-noise ratio (SNR) (>5:1) and water S-Grade: 40 C to +105 C tolerance 1 E-Grade: 40 C to +125 C Cypress-supplied software component makes capacitive sensing design easy Automatic hardware tuning (SmartSense) Note 1. This device can also operate at temperatures exceeding 125 C (the high temperature of the AEC-Q100 Grade 1 operating range) for a limited amount of time depending on the mission profile of the application. Cypress provides a retention calculator to help estimate the retention lifetime based on the customers individual temperature profiles for operation throughout the 40 C to +150 C ambient temperature range. Contact techsupport cypress.com. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-15106 Rev. *H Revised September 29, 2020