Automotive PSoC 4: PSoC 4100S Plus Datasheet Programmable System-on-Chip (PSoC) Programmable System-on-Chip (PSoC) General Description PSoC 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm Cortex-M0+ CPU while being AEC-Q100 compliant. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. PSoC 4100S Plus is a member of the PSoC 4 platform architecture. It is a combination of a microcon- troller with standard communication and timing peripherals, a capacitive touch-sensing system (CapSense) with best-in-class perfor- mance, programmable general-purpose continuous-time and switched-capacitor analog blocks, and programmable connectivity. PSoC 4100S Plus products will be upward compatible with members of the PSoC 4 platform for new applications and design needs. Timing and Pulse-Width Modulation Features Eight 16-bit timer/counter/pulse-width modulator (TCPWM) Automotive Electronics Council (AEC) AEC-Q100 Qualified blocks Center-aligned, Edge, and Pseudo-random modes 32-bit MCU Subsystem Comparator-based triggering of Kill signals for motor drive 48-MHz Arm Cortex-M0+ CPU and other high-reliability digital logic applications Up to 128 KB of flash with Read Accelerator Quadrature decoder Up to 16 KB of SRAM Clock Sources 8-channel DMA engine 4 to 33 MHz external crystal oscillator (ECO) Programmable Analog PLL to generate 48-MHz frequency Two opamps with reconfigurable high-drive external and 32-kHz Watch Crystal Oscillator (WCO) high-bandwidth internal drive and Comparator modes and 2% Internal Main Oscillator (IMO) ADC input buffering capability. Opamps can operate in Deep Sleep low-power mode. 32-kHz Internal Low-power Oscillator (ILO) 12-bit 1-Msps SAR ADC with differential and single-ended True Random Number Generator (TRNG) modes, and Channel Sequencer with signal averaging TRNG generates truly random number for secure key gen- Single-slope 10-bit ADC function provided by a capacitance eration for Cryptography applications sensing block Two current DACs (IDACs) for general-purpose or capacitive CAN Block sensing applications on any pin CAN 2.0B block with support for Time-Triggered CAN Two low-power comparators that operate in Deep Sleep (TTCAN) low-power mode Temperature Range Programmable Digital Grade-A: 40 C to +85 C Programmable logic blocks allowing Boolean operations to Grade-S: 40 C to +105 C be performed on port inputs and outputs 1 Grade-E: 40 C to +125 C Low-Power 1.71 V to 5.5 V Operation Up to 54 Programmable GPIO Pins Deep Sleep mode with operational analog and 2.5 A digital 2 40-pin QFN and 64-pin TQFP packages system current Any GPIO pin can be CapSense, analog, or digital Capacitive Sensing Drive modes, strengths, and slew rates are programmable Cypress CapSense Sigma-Delta (CSD) provides PSoC Creator Design Environment best-in-class signal-to-noise ratio (SNR) (> 5:1) and water tolerance Integrated Development Environment (IDE) provides schematic design entry and build (with analog and digital automatic routing) Cypress-supplied software component makes capacitive sensing design easy Applications Programming Interface (API) component for all fixed-function and programmable peripherals Automatic hardware tuning (SmartSense) Industry-Standard Tool Compatibility LCD Drive Capability After schematic entry, development can be done with LCD segment drive capability on GPIOs Arm-based industry-standard development tools Serial Communication Five independent run-time reconfigurable Serial Communi- 2 cation Blocks (SCBs) with re-configurable I C, SPI, UART functionality, or LIN Slave functionality Notes 1. Grade-E specifications (at +125 C) are preliminary. Contact Cypress for the availability of Grade-E devices. 2. 40-pin QFN package specifications are preliminary. Contact Cypress for the availability of 40-pin QFN package devices. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-20072 Rev. *I Revised July 4, 2019 Automotive PSoC 4: PSoC 4100S Plus Datasheet More Information Cypress provides a wealth of data at www.cypress.com to help you to select the right PSoC device for your design, and to help you to quickly and effectively integrate the device into your design. For a comprehensive list of resources, see the knowledge base article KBA86521, How to Design with PSoC 3, PSoC 4, and PSoC 5LP. Following is an abbreviated list for PSoC 4: Overview: PSoC Portfolio, PSoC Roadmap The MiniProg3 device provides an interface for flash programming and debug. Product Selectors: PSoC 1, PSoC 3, PSoC 4, PSoC 5LP In addition, PSoC Creator includes a device selection tool. Software User Guide: A step-by-step guide for using PSoC Creator. The software Application notes: Cypress offers a large number of PSoC user guide shows you how the PSoC Creator build process application notes covering a broad range of topics, from basic works in detail, how to use source control with PSoC Creator, to advanced level. Recommended application notes for getting and much more. started with PSoC 4 are: Component Datasheets: AN79953: Getting Started With PSoC 4 The flexibility of PSoC allows the creation of new peripherals AN88619: PSoC 4 Hardware Design Considerations (components) long after the device has gone into production. AN86439: Using PSoC 4 GPIO Pins Component datasheets provide all the information needed to AN57821: Mixed Signal Circuit Board Layout select and use a particular component, including a functional AN81623: Digital Design Best Practices description, API documentation, example code, and AC/DC specifications. AN73854: Introduction To Bootloaders AN89610: ARM Cortex Code Optimization Online: AN85951: PSoC 4 and PSoC Analog Coprocessor In addition to print documentation, the Cypress PSoC forums CapSense Design Guide connect you with fellow PSoC users and experts in PSoC from around the world, 24 hours a day, 7 days a week. Technical Reference Manual (TRM) is in two documents: Architecture TRM details each PSoC 4 functional block. Registers TRM describes each of the PSoC 4 registers. Development Kits: CY8CKIT-041-41XX PSoC 4100S CapSense Pioneer Kit, is an easy-to-use and inexpensive development platform. This kit includes connectors for Arduino compatible shields. CY8CKIT-149 PSoC 4100S Plus Prototyping Kit enables you to evaluate and develop with Cypress fourth-generation, low-power CapSense solution using the PSoC 4100S Plus devices. Document Number: 002-20072 Rev. *I Page 2 of 45