PSoC 4: PSoC 4200 Family Datasheet Programmable System-on-Chip (PSoC ) General DescriptionGeneral Description PSoCPSoC 44 is a scalais a scalable anble and red reconfiguconfigurrableable ppllatatfoform archirm archittecture ecture for a for a familfamilyy ooff mixed-sig mixed-signal pronal proggrammablerammable eemmbbeddedded system ed system conconttrolrolllers with an ARMers with an ARM Cortex- Cortex-M0 CPU. It cM0 CPU. It coombines mbines programmable programmable and reand reconfigurable analog configurable analog and digitand digitaal l blocks with blocks with flexible flexible auautotomamatitic rouc routtining. g. TThe PSoC 42he PSoC 4200 prod00 product familyuct family, , bbaased onsed on this plthis plaattform, form, is a combinis a combination of a miation of a microcroccontrollontroller wier withth d diigitgitaal l proprogram-gram- mablmable le logic, hogic, hiigh-pgh-peerforforrmamance ance analonalogg-to-di-to-diggiittaal conl convversionersion, o, oppampampss w wiithth Co Compmpaarratorator mode mode, , andand st staandardndard communica communicatition aon and nd titimiming ng peperipheripherals. Thrals. The PSoC e PSoC 42004200 prod productuctss will will be fulbe fullly upy upward coward compmpatiatibblele with membe with memberrs s of thof the PSoC e PSoC 4 pl4 platatform for nform for neew aw applippliccatiations aons annd d design needs. design needs. The programmable The programmable analog andanalog and digit digitaal l sub-systems allow flexibility sub-systems allow flexibility and in-field and in-field tunituning ng of the design. of the design. FeaturesFeatures 3232-bit-bit M MCCU U Sub-Sub-syssystetemm Serial CoSerial Commummunnicaticatioionn 48-MHz 48-MHz ARM Cortex-M0 CPU ARM Cortex-M0 CPU with single cycle multiplywith single cycle multiply TTwwo ino indepedependendent runnt run--time recontime reconffiigurabgurable serialle serial cocommunmmuni-i- 22 catication bloon blocks (SCBs) cks (SCBs) wwiithth rerecoconfiguranfigurabble Ile I C,C, SPI SPI, o, orr UAUARRTT UUpp to to 3232 kB kB of flaof flasshh w wiithth R Read ead AcceleAcceleraratotorr fufunctinctionaonalitylity Up to 4 kB Up to 4 kB of SRAMof SRAM TTiimingming aand Pulse-nd Pulse-WWiiddtth Moh Modulatdulatioionn ProgrProgrammable Analogammable Analog FFoour 16ur 16-b-biitt ttiimermer//cocoununtteer pur pulse-widlse-widtth modulator h modulator (TCP(TCPWM) WM) TTwwo opo opaammppss wi with reconth reconffiigurabgurable higle highh-drive externa-drive externall and and blocksblocks hhiighgh-b-bandandwidwidth internath internall drive, drive, CCoompmparator modes, andarator modes, and ADC ADC iinpunput buft bufferinferingg cap capaabbilityility Center-alCenter-aliignegned, Edgd, Edgee, a, and nd PseudPseudo-randoo-random modm modeess 1122-bit, 1-bit, 1--MspMspss SAR SAR ADADC wC wiithth d diifffferentialerential a and nd singsingle-enle-ended ded CompComparaarattor-baor-bassed ed trigtriggeringering og off KiKill ll sisignagnals for motor dls for motor drrive aive and nd momodes des ChChannannel Sequel Sequencer with signencer with signal averagal averaginging other highother high-relia-reliabilibility digty digiittaal logl logiic c aapplippliccationsations TTwwo current DACs o current DACs (IDACs) for ge(IDACs) for generalneral-p-purpourposese o orr cap capaacitive citive UpUp t too 3636 Pro Proggrammarammableble GPIOGPIOss sesensingnsing aapplippliccatiations on anons on any y pipinn TTwwo lo loow-poww-power comper comparaarattoorrs thas thatt o operate perate in Dein Deep Slep Sleep eep momodede Any Any GPIO pin canGPIO pin can bbee CCapSenapSense, se, LCLCD, anD, analogalog, or dig, or digiittaall Drive modes, strenDrive modes, strenggths, anths, and d slslew rates ew rates aarre e pprrogrammabogrammabllee ProgrProgrammable Digitammable Digitaall FourFour pr programmable logic blocks caogrammable logic blocks called universal digitlled universal digitaal blocks, l blocks, Five difFive difffererentent ppaackackagesges (UD(UDBBs), each with 8 Macrocels), each with 8 Macrocells ls aand datnd data pa paathth 48-pi48-pin Tn TQQFFPP, 44, 44-pin -pin TQFPTQFP, 40-p, 40-piin QFNn QFN,, 3 355-bal-ball Wl WLLCSPCSP,, a and nd CCyypress-providpress-provided periped peripheralheral cocompmponeonent lint librarybrary,, user-d user-defiefinedned 28-pi28-pin SSOP n SSOP ppaackageckage ststate machinate machines, anes, and Vd Veeririlog inlog inputput 22 35-ba35-ball WLll WLCSP pCSP paackackage is shippge is shipped with Ied with I C BootloC Bootloader inader in FlaFlasshh Low Low PoPowerwer 11..7711--VV t too 5.5- 5.5-V OperaV Operattionion 2200-nA S-nA Sttopop ModModee with GPIO pin with GPIO pin wwaakeupkeup ExtExteendended Ind Industdustrrial Tial Teempmperaerattureure Ope Operratatioionn HHiibernbernaate ate and nd DeeDeepp SleepSleep mod modees as allollow ww waakeupkeup-time -time versus versus 40 C to40 C to ++ 105 C ope 105 C operatiration on ppoower trade-ower trade-offfsfs PSoPSoCC Crea Creatotor r DeDesign Environsign Environmmeenntt CapCapaacciittiive Sensve Sensing ing InIntegtegrrated Develated Developmenopment Environt Environmmeennt t (IDE) (IDE) pprrovideovidess CCyypress CapSepress CapSennse Sigmase Sigma--DDeeltlta (CSD) provida (CSD) provides best-in-claes best-in-class ss schscheematic desigmatic design n eenntry antry and build buildd (w (with ith aanalnalog andog and ddiigitgitaal l SNSNR (>R (>5:1) a5:1) and nd water water totoleranleranccee automatic routingautomatic routing)) CCyypress-supplpress-supplied sofied softtwwaare componre component ent mamakekes s capcapaacitive citive AppliAppliccatiations Programmingons Programming Interface (API) componInterface (API) component ent for allfor all sensenssiinng deg desisiggnn ea easysy fifixexed-function and-function and prograd programmmabmablle perie peripherapheralls s AuAutotomamatitic hac hardware tunirdware tuning (Smang (SmartSenrtSensse)e) InIndustdustrryy--SSttanandarddard T Tool ool CoCompmpaattibilitibilityy Segment LCD Segment LCD DriveDrive AfAfter schter scheematic matic eenntrytry,, devel developmenopment can bet can be dodone with ne with ARM-bARM-baased insed industry-stdustry-standandard deveard devellopmenopment toolst tools LLCD drive suppCD drive supported on allorted on all ppiins (commons (common or n or sesegment)gment) OpeOperraatteess inin DDeep Sleeep Sleep mode with 4 bitep mode with 4 bitss per pin memory per pin memory Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-87197 Rev. *J Revised July 10, 2017 PSoC 4: PSoC 4200 Family Datasheet More Information Cypress provides a wealth of data at www.cypress.com to help you to select the right PSoC device for your design, and to help you to quickly and effectively integrate the device into your design. For a comprehensive list of resources, see the knowledge base article KBA86521, How to Design with PSoC 3, PSoC 4, and PSoC 5LP. Following is an abbreviated list for PSoC 4: Overview: PSoC Portfolio, PSoC Roadmap Technical Reference Manual (TRM) is in two documents: Architecture TRM details each PSoC 4 functional block. Product Selectors: PSoC 1, PSoC 3, PSoC 4, PSoC 5LP In addition, PSoC Creator includes a device selection tool. Registers TRM describes each of the PSoC 4 registers. Application notes: Cypress offers a large number of PSoC Development Kits: application notes covering a broad range of topics, from basic CY8CKIT-042, PSoC 4 Pioneer Kit, is an easy-to-use and to advanced level. Recommended application notes for getting inexpensive development platform. This kit includes started with PSoC 4 are: connectors for Arduino compatible shields and Digilent Pmod daughter cards. AN79953: Getting Started With PSoC 4 CY8CKIT-049 is a very low-cost prototyping platform. It is a AN88619: PSoC 4 Hardware Design Considerations low-cost alternative to sampling PSoC 4 devices. AN86439: Using PSoC 4 GPIO Pins CY8CKIT-001 is a common development platform for any AN57821: Mixed Signal Circuit Board Layout one of the PSoC 1, PSoC 3, PSoC 4, or PSoC 5LP families AN81623: Digital Design Best Practices of devices. AN73854: Introduction To Bootloaders The MiniProg3 device provides an interface for flash AN89610: ARM Cortex Code Optimization programming and debug. AN90071: CY8CMBRxxx CapSense Design Guide PSoC Creator PSoC Creator is a free Windows-based Integrated Design Environment (IDE). It enables concurrent hardware and firmware design of PSoC 3, PSoC 4, and PSoC 5LP based systems. Create designs using classic, familiar schematic capture supported by over 100 pre-verified, production-ready PSoC Components see the list of component datasheets. With PSoC Creator, you can: 1. Drag and drop component icons to build your hardware 3. Configure components using the configuration tools system design in the main design workspace 4. Explore the library of 100+ components 2. Codesign your application firmware with the PSoC hardware, 5. Review component datasheets using the PSoC Creator IDE C compiler Figure 1. Multiple-Sensor Example Project in PSoC Creator 1 2 3 4 5 Document Number: 001-87197 Rev. *J Page 2 of 45