Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as Cypress document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio. Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document. Future revisions will occur when appropriate, and any changes will be set out on the document history page. Continuity of ordering part numbers Infineon continues to support existing part numbers. Please continue to use the ordering part numbers listed in the datasheet for ordering. www.infineon.com PSoC 4: PSoC 4700S Family Datasheet PRELIMINARY Programmable System-on-Chip (PSoC) General Description PSoC 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an Arm Cortex-M0+ CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The PSoC 4700S product family, based on this platform, is the industrys first microcontroller with inductive sensing and capacitive sensing technology in a single chip. The inductive sensing (MagSense) technology enables sensing of metal objects and industry s leading capacitive sensing (CapSense ) technology enables sensing of non-metallic objects. Features 32-bit MCU Subsystem Serial Communication 48-MHz Arm Cortex-M0+ CPU Two independent run-time reconfigurable Serial 2 Communication Blocks (SCBs) with re-configurable I C, SPI, Up to 32 KB of flash with Read Accelerator or UART functionality Up to 4 KB of SRAM LCD Drive Capability Inductive Sensing LCD segment drive capability on GPIOs Cypress MagSense provides superior noise immunity Timing and Pulse-Width Modulation Reliably detects metal deflection under 190 nm Five 16-bit timer/counter/pulse-width modulator (TCPWM) MagSense software component automatically calibrates to blocks compensate for the manufacturing variations Center-aligned, Edge, and Pseudo-random modes Up to 16 sensors Comparator-based triggering of Kill signals for motor drive and Capacitive Sensing other high-reliability digital logic applications Cypress CapSense Sigma-Delta (CSD) provides best-in-class Up to 36 Programmable GPIO Pins signal-to-noise ratio (SNR) (>5:1) and water tolerance 48-pin TQFP, 24-pin QFN, and 25-ball WLCSP packages Cypress-supplied software component makes capacitive sensing design easy Any GPIO pin can be capacitive sensing, analog, or digital up to 16 pins can be used for inductive sensing. Automatic hardware tuning (SmartSense) Drive modes, strengths, and slew rates are programmable Programmable Analog PSoC Creator Design Environment One single-slope 10-bit ADC function Two current DACs (IDACs) Integrated Development Environment (IDE) provides schematic design entry and build (with analog and digital Two low-power comparators that operate in Deep Sleep automatic routing) low-power mode Applications Programming Interface (API) component for all Programmable Digital fixed-function and programmable peripherals Two SmartIO ports allowing Boolean operations to be performed Industry-Standard Tool Compatibility on port inputs and outputs After schematic entry, development can be done with Low-Power 1.71-V to 5.5-V Operation Arm-based industry-standard development tools Deep Sleep mode with operational analog and 2.5 A digital system current Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-20489 Rev. *D Revised December 17, 2020