Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as Cypress document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio. Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document. Future revisions will occur when appropriate, and any changes will be set out on the document history page. Continuity of ordering part numbers Infineon continues to support existing part numbers. Please continue to use the ordering part numbers listed in the datasheet for ordering. www.infineon.comPSoC Analog Coprocessor: CY8C4Axx Family Datasheet Programmable System-on-Chip (PSoC) General Description Cypress PSoC Analog Coprocessor is a scalable and reconfigurable platform architecture of programmable analog coprocessors that simplify designing embedded systems with multiple sensors. The PSoC Analog Coprocessor device combines PSoCs flexible Analog Front Ends, programmable analog filters, and high-resolution analog-to-digital converters along with an efficient yet powerful 32-bit Arm Cortex-M0+ based signal processing engine enabling host processors to easily fetch aggregated, pre-processed, and formatted complex sensor data over serial communication interfaces. Features Programmable Analog Blocks Low-Power Operation A switched-capacitor Universal Analog Block (UAB) 1.71-V to 5.5-V operation programmable via PSoC Creator as a second-order analog Deep-Sleep mode with operational analog and 2.5-A digital filter, a 12-bit Incremental Delta-Sigma ADC, or two 13-bit system current Voltage DACs Watch Crystal Oscillator (WCO) Two dedicated analog-to-digital converters (ADC) including a 12-bit SAR ADC and a 10-bit single-slope ADC Programmable GPIO Pins Four opamps, two low-power comparators, and a flexible Up to 38 GPIOs that can be used for analog, digital, CapSense, 38-channel analog mux to create custom Analog Front Ends or LCD functions with programmable drive modes, strength and (AFE) slew rates Two 7-bit Current DACs (IDACs) for general-purpose or capac- Includes eight Smart I/Os to implement pin-level Boolean itive sensing applications on any pin operations on input and output signals CapSense Capacitive Sensing 48-pin QFN, 48-pin TQFP, 28-pin SSOP, and 45-ball WLCSP packages Cypress s fourth-generation CapSense Sigma-Delta (CSD) providing best-in-class signal-to-noise ratio (SNR) and water PSoC Creator Design Environment tolerance Integrated design environment (IDE) provides Cypress-supplied software component makes capacitive schematic-capture design entry and build (with automatic sensing design easy routing of analog and digital signals) and concurrent firmware development with an Arm-SWD debugger Automatic hardware tuning (SmartSense) GUI-based configurable PSoC Components with fully Segment LCD Drive engineered embedded initialization, calibration and correction LCD drive supported on all pins (common or segment) algorithms Operates in Deep-Sleep mode with four bits per pin memory Application programming interfaces (API) for all fixed-function and programmable peripherals Programmable Digital Peripherals Industry-Standard Tool Compatibility Three independent serial communication blocks (SCBs) that are run-time configurable as I2C, SPI or UART After schematic-capture, firmware development can be done with Arm-based industry-standard development tools Eight 16-bit timer/counter/pulse-width modulator (TCPWM) blocks with center-aligned, edge, and pseudo-random modes 32-bit Signal Processing Engine Arm Cortex-M0+ CPU up to 48 MHz Up to 32 KB of flash with read accelerator Up to 4 KB of SRAM Eight-channel descriptor-based DMA controller Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 001-96467 Rev. *J Revised December 16, 2020