Data Sheet No. PD60032 rev P ( )( ) & (PbF) J S IR2131 3 HIGH SIDE AND 3 LOW SIDE DRIVER Features Floating channel designed for bootstrap operation Product Summary Fully operational to +600V Tolerant to negative transient voltage dV/dt immune V 600V max. OFFSET Gate drive supply range from 10 to 20V Undervoltage lockout for all channels I +/- 160 mA / 360 mA O Over-current shutdown turns off all six drivers Independent 3 high side & 3 low side drivers V 10 - 20V OUT Matched propagation delay for all channels 2.5V logic compatible t (typ.) 1.3 & 0.6 s on/off Outputs out of phase with inputs 28-Lead SOIC & 44-Lead PLCC are also available in Lead-Free. Description Packages The IR2131(J)(S) is a high voltage, high speed power MOSFET and IGBT driver with three independent high and low side referenced output channels. Proprietary HVIC technology enables ruggedized monolithic construction. 28-Lead Logic inputs are compatible with CMOS or LSTTL outputs, SOIC down to 2.5V logic. A current trip function which termi- nates all six outputs can be derived from an external cur- rent sense resistor. A shutdown input is provided for a 28-Lead PDIP customized shutdown function. An open drain FAULT signal is provided to indicate that any of the shutdowns has 44-Lead PLCC occurred. The output drivers feature a high pulse current w/o 12 Leads buffer stage designed for minimum driver cross-conduc- tion. Propagation delays are matched to simplify use in high frequency applications. The floating channels can be used to drive N-channel power MOSFETs or IGBTs in the high side configuration which operate up to 600 volts. Typical Connection (Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com 1( )( ) & (PbF) IR2131 J S Absolute Maximum Ratings Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage param- eters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions. Additional Information is shown in Figures 7 through 10. Symbol Definition Min. Max. Units V High Side Floating Supply Voltage -0.3 625 B1,2,3 V High Side Floating Offset Voltage V - 25 V + 0.3 S1,2,3 B1,2,3 B1,2,3 V High Side Floating Output Voltage V - 0.3 V + 0.3 HO1,2,3 S1,2,3 B1,2,3 V Low Side and Logic Fixed Supply Voltage -0.3 25 CC V Logic Ground V - 25 V + 0.3 SS CC CC V V Low Side Output Voltage -0.3 V + 0.3 LO1,2,3 CC HIN1,2,3 LIN1,2,3 V Logic Input Voltage ( , ,FLT -CLR , SD & ITRIP) V - 0.3 (V + 15) or IN SS SS (V + 0.3) CC whichever is lower V Output Voltage V - 0.3 V + 0.3 FAULT FLT SS CC dV /dt Allowable Offset Supply Voltage Transient 50 V/ns S P Package Power Dissipation T +25 C (28 Lead DIP) 1.5 D A (28 Lead SOIC) 1.6 W (44 Lead PLCC) 2.0 Rth Thermal Resistance, Junction to Ambient (28 Lead DIP) 83 JA (28 Lead SOIC) 78 C/W (44 Lead PLCC) 63 C T Junction Temperature 150 J T Storage Temperature -55 150 S T Lead Temperature (Soldering, 10 seconds) 300 L Recommended Operating Conditions The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to COM. The V offset rating is tested S with all supplies biased at 15V different Symbol Definition Min. Max. Units V High Side Floating Supply Voltage V + 10 V + 20 B1,2,3 S1,2,3 S1,2,3 V High Side Floating Offset Voltage Note 1 600 S1,2,3 V High Side Floating Output Voltage V V HO1,2,3 S1,2,3 B1,2,3 V Low Side and Logic Fixed Supply Voltage 10 20 CC V V Logic Ground -5 5 SS V Low Side Output Voltage 0 V LO1,2,3 CC V Logic Input Voltage (HIN1,2,3,LIN1,2,3,FLT -CLR , SD & ITRIP) V V + 5 IN SS SS V FAULT Output Voltage V V FLT SS CC T Ambient Temperature -40 125 C A Note 1: Logic operational for V of -5V to +600V. Logic state held for V of -5V to -V . (Please refer to the Design Tip S S BS DT97-3 for more details). Note 2: All input pins, CA- and CAO pins are internally clamped with a 5.2V zener diode. 2 www.irf.com