Data Sheet No. PD60062 revP (NOTE:For new designs, we recommend IRs new product IRS2153D) IR2153(D)(S) &(PbF) SELF-OSCILLATING HALF-BRIDGE DRIVER Features Product Summary Integrated 600V half-bridge gate driver V 600V max. 15.6V zener clamp on Vcc OFFSET True micropower start up Duty Cycle 50% Tighter initial deadtime control Low temperature coefficient deadtime T /T 80/40ns r p Shutdown feature (1/6th Vcc) on C pin T Increased undervoltage lockout Hysteresis (1V) V 15.6V clamp Lower power level-shifting circuit Constant LO, HO pulse widths at startup Deadtime (typ.) 1.2 s Lower di/dt gate driver for better noise immunity Low side output in phase with RT Packages Internal 50nsec (typ.) bootstrap diode (IR2153D) Excellent latch immunity on all inputs and outputs ESD protection on all leads Also available LEAD-FREE Description The IR2153D(S) are an improved version of the 8 Lead PDIP 8 Lead SOIC popular IR2155 and IR2151 gate driver ICs, and incor- porates a high voltage half-bridge gate driver with a front end oscillator similar to the industry standard CMOS 555 timer. The IR2153 provides more functionality and is easier to use than previous ICs. A shutdown feature has been designed into the C pin, so that both gate driver outputs can be disabled using a low voltage control T signal. In addition, the gate driver output pulse widths are the same once the rising undervoltage lockout threshold on V has been reached, resulting in a more stable profile of frequency vs time at startup. CC Noise immunity has been improved significantly, both by lowering the peak di/dt of the gate drivers, and by increasing the undervoltage lockout hysteresis to 1V. Finally, special attention has been payed to maximizing the latch immunity of the device, and providing comprehensive ESD protection on all pins. Typical Connections IR2153(S) IR2153D 600V 600V MAX MAX VCC VB VCC VB HO HO RT VS RT VS CT LO CT LO Shutdown COM Shutdown COM www.irf.com 1IR2153(D)(S) & (PbF) NOTE:For new designs, we recommend IRs new product IRS2153D Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param- eters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min. Max. Units V High side floating supply voltage -0.3 625 B V High side floating supply offset voltage V - 25 V + 0.3 S B B V High side floating output voltage V - 0.3 V + 0.3 HO S B V V Low side output voltage -0.3 V + 0.3 LO CC V R pin voltage -0.3 V + 0.3 RT T CC V C pin voltage -0.3 V + 0.3 CT T CC I Supply current (note 1) 25 CC mA I R pin current -5 5 RT T dV /dt Allowable offset voltage slew rate -50 50 V/ns s P Maximum power dissipation T +25C (8 Lead DIP) 1.0 D A W (8 Lead SOIC) 0.625 Rth Thermal resistance, junction to ambient (8 Lead DIP) 125 JA C/W (8 Lead SOIC) 200 T Junction temperature -55 150 J T Storage temperature -55 150 C S T Lead temperature (soldering, 10 seconds) 300 L Recommended Operating Conditions For proper operation the device should be used within the recommended conditions. Symbol Definition Min. Max. Units V High side floating supply voltage V - 0.7 V Bs CC CLAMP V V Steady state high side floating supply offset voltage -3.0 (note 2) 600 S V Supply voltage 10 V CC CLAMP I Supply current (note 3) 5 mA CC T Junction temperature -40 125 C J Note 1: This IC contains a zener clamp structure between the chip V and COM which has a nominal breakdown CC voltage of 15.6V. Please note that this supply pin should not be driven by a DC, low impedance power source greater than the V specified in the Electrical Characteristics section. CLAMP Note 2: Care should be taken to avoid output switching conditions where the V node flies inductively below ground by S more than 5V. Note 3: Enough current should be supplied to the V pin of the IC to keep the internal 15.6V zener diode clamping the CC voltage at this pin. 2 www.irf.com