IR21571 Data Sheet PD No. 60179 revM Not recommended for new design: please use IRS21571D IR21571(S) & (PbF) FULLY INTEGRATED BALLAST CONTROL IC Features Programmable preheat time & frequency Thermal overload protection Programmable deadtime Programmable ignition ramp Protection from failure-to-strike Integrated 600V level-shifting gate driver Lamp filament sensing & protection Internal 15.6V zener clamp diode on VCC Micropower startup (150uA) Protection from operation below resonance - 0.2V CS threshold syncd to falling edge on LO Latch immunity protection on all leads Protection from low-line condition ESD protection on all leads Parts also available LEAD-FREE Automatic restart for lamp exchange Packages Description The IR21571 is a fully integrated, fully protected 600V ballast control IC designed to drive virtually all types of rapid start fluorescent lamp ballasts. Externally pro- grammable features such as preheat time & frequency, ignition ramp characteris- 16 Lead SOIC tics, and running mode operating frequency provide a high degree of flexibility for (narrow body) the ballast design engineer. Comprehensive protection features such as protec- tion from failure of a lamp to strike, filament failures, low dc bus conditions, thermal overload, or lamp failure during normal operation, as well as an automatic restart function, have been included in the design. The heart of this control IC is a variable frequency oscillator with externally programmable deadtime. Precise control of a 50% duty cycle is accomplished using a T-flip-flop. The IR21571 is available in both 16 pin DIP and 16 pin narrow body SOIC packages. 16 Lead PDIP Typical Connection + Rectified AC Line + V BUS R2 R1 R Supply VDC HO 1 16 R C L GHS BLOCK RES C1 CPH VS 2 15 C C PH BS RPH VB 3 14 C SNUBBER C R D BOOT RAMP PH RT VCC 4 13 R T R C RUN VCC D1 RUN COM 5 12 C R D2 C START START RES CT LO 6 11 R C GLS T R R3 DT DT CS 7 10 R5 R R4 OC OC SD 8 9 C2 R CS V return BUS www.irf.com 1IR21571(S) & (PbF) Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min. Max. Units V High side floating supply voltage -0.3 625 B V High side floating supply offset voltage V - 25 V + 0.3 S B B V V High side floating output voltage V - 0.3 V + 0.3 HO S B V Low side output voltage -0.3 V + 0.3 LO CC I Maximum allowable output current (either output) due to OMAX -500 500 external power transistor miller effect mA I R pin current -5 5 RT T V C pin voltage -0.3 5.5 CT T V V V pin voltage -0.3 V + 0.3 DC DC CC I CPH pin current -5 5 CPH I RPH pin current -5 5 RPH mA I RUN pin current -5 5 RUN I Deadtime pin current -5 5 DT V Current sense pin voltage -0.3 5.5 V CS I Current sense pin current -5 5 CS I Over-current threshold pin current -5 5 OC mA I Shutdown pin current -5 5 SD I Supply current (note 1) -20 20 CC dV/dt Allowable offset voltage slew rate -50 50 V/ns P Package power dissipation T +25C (16 lead PDIP) 1.60 D A W P = (T -T )/Rth (16 lead SOIC) 1.00 D JMAX A JA Rth Thermal resistance, junction to ambient (16 lead PDIP) 75 JA C/W (16 lead SOIC) 115 T Junction temperature -55 150 J T Storage temperature -55 150 C S T Lead temperature (soldering, 10 seconds) 300 L Note 1: This IC contains a zener clamp structure between the chip V and COM which has a nominal breakdown CC voltage of 15.6V. Please note that this supply pin should not be driven by a DC, low impedance power source greater than the V specified in the Electrical Characteristics section. CLAMP 2 www.irf.com