DCDC Converter Digital SupIRBuck 15A Single-input Voltage, Synchronous Buck Regulator with PMBus Interface IR38062 FEATURES DESCRIPTION Internal LDO allows single 21V operation The IR38062 PMBus SupIRBuck is an easy-to-use, fully integrated and highly efficient DC/DC regulator Output Voltage Range: 0.5V to 0.875*PVin with I2C/PMBus interface. The onboard PWM controller 0.5% accurate Reference Voltage and MOSFETs make IR38062 a space-efficient solution, providing accurate power delivery for low Programmable Switching Frequency up to output voltage and high current applications. 1.5MHz using Rt/Sync pin or PMBus Internal Soft-Start with Pre-Bias Start-up The IR38062 can be comprehensively configured via Enable input with Voltage Monitoring Capability PMBus and the configuration stored in internal memory. In addition, PMBus commands allow run-time Remote Sense Amplifier with True Differential control, fault status and telemetry. Voltage Sensing Fast mode I2C and 400 kHz PMBus interface The IR38062 can also operate as a standard analog regulator without any programming and can provide Sequencing and tracking capable current and temperature telemetry in an analog format. Selectable analog mode or digital mode 66 PMBus commands for configuration, control, fault protection and telemetry. Thermally compensated current limit with APPLICATIONS configurable overcurrent responses Optional light load efficiency mode Server Applications External synchronization with Smooth Clocking Netcomm applications Dedicated output voltage sensing protection Embedded telecom Systems which remains active even when Enable is low. Distributed Point Of Load Architectures Integrated MOSFETs and Bootstrap diode o o Operating junction temp: -40 C<Tj<125 C Small Size 5mmx7mm PQFN Pb-Free (RoHS Compliant) ORDERING INFORMATION Standard Pack Base Part Number Package Type Orderable Part Number Form Quantity IR38062 QFN 5 mm x 7 mm Tape and Reel 4000 IR38062MTRPBF 1 Rev 3.14 Mar 14, 2018 IR38062 BASIC APPLICATION 5.5V <Vin<21V P1V8 Track EN Vin PVin Boot Vo Vcc/ SW LDO out Vsns PGood RS+ PGood RS- Rt/SYNC En/FCCM RSo Fb Vp Comp ADDR PGnd LGnd Figure 1: Typical Application Circuit Figure 2: Performance Curve PINOUT DIAGRAM Note: Pins 23 and 26 are connected internally but appear separated externally (refer to assembly drawing) Figure 3: IR38062 package (Top View) 5mm x 7mm PQFN 2 Rev 3.14 Mar 14, 2018 SCL/OCSet SDA/IMON SAlert/TMON