IRS21091SPBF Infineon

Data Sheet No. PD60311 IRS21091(S)PbF HALF-BRIDGE DRIVER Features Floating channel designed for bootstrap operation Product Summary Fully operational to +600 V Tolerant to negative transient voltage, dV/dt immune V 600 V max. OFFSET Gate drive supply range from 10 V to 20 V Undervoltage lockout for both channels I +/- 120 mA / 250 mA O 3.3 V, 5 V, and 15 V input logic compatible V 10 V - 20 V Cross-conduction prevention logic OUT Matched propagation delay for both channels t (typ.) 750 ns & 200 ns on/off High-side output in phase with IN input Logic and power ground +/- 5 V offset Deadtime 540 ns Internal 500 ns deadtime, and programmable up to 5 s with one external R resistor DT Lower di/dt gate driver for better noise immunity The dual function DT/SD input turns off both Packages channels RoHS compliant Description The IRS21091 is a high voltage, high speed power MOSFET and IGBT driver with dependent high- and low-side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is 8 Lead PDIP 8 Lead SOIC compatible with standard CMOS or LSTTL output, IRS21091 IRS21091S down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates up to 600 V. Typical Connection up to 600 V V CC V V CC B IN IN HO DT/SD TO DT/SD V S LOAD COM LO (Refer to Lead Assignments for correct configuration). These dia- grams show electrical connec- tions only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com 1IRS21091(S)PbF Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param- eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min. Max. Units V High-side floating absolute voltage -0.3 625 B V High-side floating supply offset voltage V - 25 V + 0.3 S B B V High-side floating output voltage V - 0.3 V + 0.3 HO S B V Low-side and logic fixed supply voltage -0.3 25 CC V V Low-side output voltage -0.3 V + 0.3 LO CC DT/SD Programmable deadtime and shutdown pin voltage V - 0.3 V + 0.3 SS CC V Logic input voltage (IN & DT/SD) V - 0.3 V + 0.3 IN SS CC dV /dt Allowable offset supply voltage transient 50 V/ns S (8 Lead PDIP) 1.0 P Package power dissipation T +25 C W D A (8 Lead SOIC) 0.625 (8 Lead PDIP) 125 Rth Thermal resistance, junction to ambient C/W JA (8 Lead SOIC) 200 T Junction temperature 150 J C T Storage temperature -50 150 S T Lead temperature (soldering, 10 seconds) 300 L www.irf.com 2