IRS2109SPBF Infineon

Data Sheet No. PD60261 IRS2109/IRS21094(S)PbF HALF-BRIDGE DRIVER Features Floating channel designed for bootstrap operation Product Summary Fully operational to +600 V Tolerant to negative transient voltage, dV/dt immune V 600 V max. OFFSET Gate drive supply range from 10 V to 20 V Undervoltage lockout for both channels I +/- 120 mA / 250 mA O 3.3 V, 5 V, and 15 V input logic compatible V 10 V - 20 V Cross-conduction prevention logic OUT Matched propagation delay for both channels t (typ.) 750 ns & 200 ns on/off High-side output in phase with IN input Logic and power ground +/- 5 V offset. Deadtime 540 ns Internal 540 ns deadtime, and programmable (programmable up to 5 s for IRS21094) up to 5 s with one external R resistor (IRS21094) DT Lower di/dt gate driver for better noise immunity Shutdown input turns off both channels. Packages RoHS compliant Description The IRS2109/IRS21094 are high voltage, high speed power MOSFET and IGBT drivers with de- pendent high- and low-side referenced output 8 Lead SOIC 14 Lead SOIC channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with stan- dard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-con- 14 Lead PDIP duction. The floating channel can be used to drive 8 Lead PDIP an N-channel power MOSFET or IGBT in the high- side configuration which operates up to 600 V. Typical Connection IRS21094 IRS2109 (Refer to Lead Assignments for correct T configuration). These diagrams show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. www.irf.com 1IRS2109/IRS21094(S)PbF Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param- eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Symbol Definition Min. Max. Units V High-side floating absolute voltage -0.3 625 B V High-side floating supply offset voltage V - 25 V + 0.3 S B B V High-side floating output voltage V - 0.3 V + 0.3 HO S B V Low-side and logic fixed supply voltage -0.3 25 CC V V Low-side output voltage -0.3 V + 0.3 LO CC DT Programmable deadtime pin voltage (IRS21094 only) V - 0.3 V + 0.3 SS CC V Logic input voltage (IN & SD) V - 0.3 V + 0.3 IN SS CC V Logic ground (IRS21094/IRS21894 only) V - 25 V + 0.3 SS CC CC dV /dt Allowable offset supply voltage transient 50 V/ns S (8 Lead PDIP) 1.0 (8 Lead SOIC) 0.625 PD Package power dissipation T +25 C A W (14 lead PDIP) 1.6 (14 lead SOIC) 1.0 (8 Lead PDIP) 125 (8 Lead SOIC) 200 Rth Thermal resistance, junction to ambient JA C/W (14 lead PDIP) 75 (14 lead SOIC) 120 T Junction temperature 150 J T Storage temperature -50 150 C S T Lead temperature (soldering, 10 seconds) 300 L www.irf.com 2