MB91F467DAPFVS-GSE2 Infineon

CY91460D Series FR60 32-bit Microcontroller CY91460D series is a line of general-purpose 32-bit RISC microcontrollers designed for embedded control applications which require high-speed real-time processing, such as consumer devices and on-board vehicle systems. This series uses the FR60 CPU, which is compatible with the FR family of CPUs. This series contains the LIN-USART and CAN controllers. Features Bit search module (for REALOS) FR60 CPU Core Function to search from the MSB (most significant bit) for the position of the first 0, 1, or changed bit in a word 32-bit RISC, load/store architecture, five-stage pipeline LIN-USART (full duplex double buffer): 5 channels 16-bit fixed-length instructions (basic instructions) Clock synchronous/asynchronous selectable Instruction execution speed: 1 instruction per cycle Sync-break detection Instructions including memory-to-memory transfer, bit Internal dedicated baud rate generator manipulation, and barrel shift instructions: Instructions suitable 2 I C bus interface (supports 400 kbps): 3 channels for embedded applications Master/slave transmission and reception Function entry/exit instructions and register data multi-load Arbitration function, clock synchronization function store instructions : Instructions supporting C language CAN controller (C-CAN): 3 channels Register interlock function: Facilitating assembly-language Maximum transfer speed: 1 Mbps coding 32 transmission/reception message buffers Built-in multiplier with instruction-level support Stepper motor controller : 6 channels Signed 32-bit multiplication: 5 cycles 4 high current output to each channel Signed 16-bit multiplication: 3 cycles 2 synchronized PWMs per channel (8/10-bit) Interrupts (save PC/PS) : 6 cycles (16 priority levels) Sound generator : 1 channel Tone frequency : PWM frequency divide-by-two (reload value Harvard architecture enabling program access and data 1) access to be performed simultaneously Alarm comparator : 1 channel Instructions compatible with the FR family Monitor external voltage Internal Peripheral Resources Generate an interrupt in case of voltage lower/higher than the defined thresholds (reference voltage) General-purpose ports : Maximum 170 ports 16-bit PPG timer : 12 channels DMAC (DMA Controller) 16-bit PFM timer : 1 channel Maximum of 5 channels able to operate simultaneously. (External to external : 1 channel) 16-bit reload timer: 8 channels 3 transfer sources (external pin/internal peripheral/software) 16-bit free-run timer: 8 channels (1 channel each for ICU and Activation source can be selected using software. OCU) Addressing mode specifies full 32-bit addresses (increment/decrement/fixed) Input capture: 8 channels (operates in conjunction with the Transfer mode (demand transfer/burst transfer/step free-run timer) transfer/block transfer) Output compare: 4 channels (operates in conjunction with the Fly-by transfer support (between external I/O and memory) free-run timer) Transfer data size selectable from 8/16/32-bit Multi-byte transfer enabled (by software) Up/Down counter: 3 channels (3*8-bit or 1*16-bit + 1*8-bit) DMAC descriptor in I/O areas (200 to 240 , 1000 to H H H Watchdog timer 1024 ) H A/D converter (successive approximation type) Real-time clock 10-bit resolution: 24 channels Low-power consumption modes : Sleep/stop mode function Conversion time: minimum 1 s Supply Supervisor: Low voltage detection circuit for external External interrupt inputs : 14 channels V 5 and internal 1.8V core voltage DD 8 channels shared with CAN RX or I2C pins Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-04613 Rev. *B Revised November 17, 2017 CY91460D Series Clock supervisor Sub-oscillator stabilization timer Monitors the sub-clock (32 kHz) and the main clock Generates an interrupt in main clock mode after the (4 MHz) , and switches to a recovery clock (CR oscillator, stabilization wait time has elapsed on the 15-bit stabilization etc.) when the oscillations stop. wait time counter Clock modulator Package and Technology Clock monitor Package : QFP-208 Sub-clock calibration CMOS 0.18 m technology Corrects the real-time clock timer when operating with the 32 Power supply range 3 V to 5 V (1.8 V internal logic provided by kHz or CR oscillator a step-down voltage converter) Main oscillator stabilization timer Operating temperature range: between 40C and 105C Generates an interrupt in sub-clock mode after the stabilization wait time has elapsed on the 23-bit stabilization wait time counter Document Number: 002-04613 Rev. *B Page 2 of 138