The following document contains information on Cypress products. The document has the series name, product name, and ordering part numbering with the prefix MB. However, Cypress will offer these products to new and existing customers with the series name, product name, and ordering part number with the prefix CY. How to Check the Ordering Part Number 1. Go to www.cypress.com/pcn. 2. Enter the keyword (for example, ordering part number) in the SEARCH PCNS field and click Apply. 3. Click the corresponding title from the search results. 4. Download the Affected Parts List file, which has details of all changes For More Information Please contact your local sales office for additional information about Cypress products and solutions. About Cypress Cypress is the leader in advanced embedded system solutions for the world s most innovative automotive, industrial, smart home appliances, consumer electronics and medical products. Cypress microcontrollers, analog ICs, wireless and USB-based connectivity solutions and reliable, high-performance memories help engineers design differentiated products and get them to market first. Cypress is committed to providing customers with the best support and development resources on the planet enabling them to disrupt markets by creating new product categories in record time. To learn more, go to www.cypress.com. MB91590 Series FR Family FR81S 32-Bit Microcontroller This series is Cypress 32-bit microcontroller designed for automotive and industrial control applications. It contains the FR81S CPU that is compatible with the FR family. The FR81S has a high level performance among the Cypress FR family by enhancing CPU instruction pipeline and load store processing, and improving internal bus transfer. It is best suited for application control for automotive. Features FR81S CPU Core Peripheral Functions 32-bit RISC, load/store architecture, pipeline 5-stage Clock generation (equipped with SSCG function) structure Main oscillation (4MHz) Sub oscillation (32kHz) or none sub oscillation Maximum operating frequency: PLL multiplication rate : 1 to 32 times 128 MHz (Source oscillation = 4.0 MHz and 32 multiplied Built-in Program flash memory capacity 2048 + 64KB (series (PLL clock multiplication system)) maximum) It shows maximum CPU frequency of series. The specification of each part number can be referred in Built-in Data flash memory capacity(WorkFlash) 64KB Product Lineup and Electrical Characteristics. Built-in RAM capacity General-purpose register : 32 bits 16 sets Main RAM 192KB (Series maximum) Sub RAM (on AHB) 64KB (Series maximum) 16-bit fixed length instructions (basic instruction), Backup RAM 8KB 1 instruction per cycle General-purpose ports (5V Pin) : 63 Instructions appropriate to embedded applications (dual clock products : 61) Memory-to-memory transfer instruction 2 Included I C pseudo open drain support ports : 4 Bit processing instruction Barrel shift instruction etc. General-purpose ports (3V Pin) : 93 Included 48 combined external bus interface (For GDC High-level language support instructions external memory I/F) Function entry/exit instructions External bus interface Register content multi-load and store instructions GDC external memory for I/F use Bit search instructions 25-bit address, 16-bit data Logical 1 detection, 0 detection, and change-point Power supply voltage fixed to 3.3V detection DMA Controller Branch instructions with delay slot Up to 16 channels can be started simultaneously. Reduced overhead during branch process 2 transfer factors (Internal peripheral request and software) Register interlock function A/D converter (successive approximation type) Easy assembler writing 8/10-bit resolution : 32 channels The support at the built-in / instruction level of the multiplier Conversion time : 3s Signed 32-bit multiplication : 5 cycles External interrupt input: 16 channels Signed 16-bit multiplication : 3 cycles Level /), or edge detection (rising or falling) Interrupt (PC/PS saving) enabled 6 cycles (16 priority levels) LIN-UART The Harvard architecture allows simultaneous execution of 6 channels, ch.2 to ch.7 program and data access. UART, synchronous mode, LIN-UART mode is selectable. LIN protocol Revision 2.1 is supported Instruction compatibility with the FR Family SPI (Serial Peripheral Interface) supported (synchronous Built-in memory protection function (MPU) mode) Eight protection areas can be specified commonly for Full-duplex double buffering system instructions and the data. LIN synch break detection (linked to the input capture) Control access privilege in both privilege mode and user Built-in dedicated baud rate generator mode. DMA transfer support Built-in FPU (floating point arithmetic) IEEE754 compliant Floating-point register 32-bit 16 sets Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-04727 Rev. *B Revised December 1, 2017