MB95710M Series MB95770M Series New 8FX 8-bit Microcontrollers The MB95710M/770M Series is a series of general-purpose, single-chip microcontrollers. In addition to a compact instruction set, the microcontrollers of this series contain a variety of peripheral resources. Interrupt by edge detection (rising edge, falling edge, and Features both edges can be selected) 2 Can be used to wake up the device from different low power F MC-8FX CPU core consumption (standby) modes Instruction set optimized for controllers Multiplication and division instructions 8/12-bit A/D converter 8 channels 16-bit arithmetic operations 8-bit or 12-bit resolution can be selected. Bit test branch instructions LCD controller (LCDC) Bit manipulation instructions, etc. On MB95F714J/F714M/F716J/F716M/F718J/F718M, LCD output can be selected from 40 SEG 4 COM and 36 SEG Clock 8 COM. Selectable main clock source On MB95F774J/F774M/F776J/F776M/F778J/F778M, LCD Main oscillation clock (up to 16.25 MHz, maximum ma- output can be selected from 32 SEG 4 COM and 28 SEG chine clock frequency: 8.125 MHz) 8 COM. External clock (up to 32.5 MHz, maximum machine clock Internal divider resistor whose resistance value can be se- lected from 10 k or 100 k through software frequency: 16.25 MHz) Interrupt in sync with the LCD module frame frequency Main CR clock (4 MHz 2%) Blinking function Main CR PLL clock Inverted display function - The main CR PLL clock frequency becomes 8 MHz 2% when the PLL multiplication rate is 2. Low power consumption (standby) modes - The main CR PLL clock frequency becomes 10 MHz There are four standby modes as follows: 2% when the PLL multiplication rate is 2.5. Stop mode - The main CR PLL clock frequency becomes 12 MHz Sleep mode 2% when the PLL multiplication rate is 3. Watch mode - The main CR PLL clock frequency becomes 16 MHz Time-base timer mode 2% when the PLL multiplication rate is 4. I/O port Main PLL clock (up to 16.25 MHz, maximum machine clock frequency: 16.25 MHz) MB95F714J/F716J/F718J (number of I/O ports: 75) General-purpose I/O ports (CMOS I/O): 71 Selectable subclock source Suboscillation clock (32.768 kHz) General-purpose I/O ports (N-ch open drain): 4 External clock (32.768 kHz) MB95F714M/F716M/F718M (number of I/O ports: 74) General-purpose I/O ports (CMOS I/O): 71 Sub-CR clock (Typ: 100 kHz, Min: 50 kHz, Max: 150 kHz) General-purpose I/O ports (N-ch open drain): 3 Timer MB95F774J/F776J/F778J (number of I/O ports: 59) 8/16-bit composite timer 2 channels General-purpose I/O ports (CMOS I/O): 55 8/16-bit PPG 2 channels General-purpose I/O ports (N-ch open drain): 4 16-bit reload timer 1 channel MB95F774M/F776M/F778M (number of I/O ports: 58) Event counter 1 channel General-purpose I/O ports (CMOS I/O): 55 Time-base timer 1 channel General-purpose I/O ports (N-ch open drain): 3 Watch counter 1 channel Watch prescaler 1 channel On-chip debug UART/SIO 3 channels 1-wire serial control Serial writing supported (asynchronous mode) Full duplex double buffer Capable of clock asynchronous (UART) serial data transfer Hardware/software watchdog timer and clock synchronous (SIO) serial data transfer Built-in hardware watchdog timer 2 I C bus interface 1 channel Built-in software watchdog timer Built-in wake-up function Power-on reset External interrupt 8 channels A power-on reset is generated when the power is switched on. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-09307 Rev. *A Revised November 14, 2016 MB95710M Series MB95770M Series Low-voltage detection (LVD) circuit (only available on Dual operation Flash memory MB95F714J/F716J/F718J/F774J/F776J/F778J) The program/erase operation and the read operation can be executed in different banks (upper bank/lower bank) simul- Built-in low-voltage detection function taneously. Comparator 1 channel Flash memory security function Clock supervisor counter Protects the content of the Flash memory. Built-in clock supervisor counter Document Number: 002-09307 Rev. *A Page 2 of 172