The following document contains information on Cypress products. The document has the series name, product name, and ordering part numbering with the prefix MB. However, Cypress will offer these products to new and existing customers with the series name, product name, and ordering part number with the prefix CY. How to Check the Ordering Part Number 1. Go to www.cypress.com/pcn. 2. Enter the keyword (for example, ordering part number) in the SEARCH PCNS field and click Apply. 3. Click the corresponding title from the search results. 4. Download the Affected Parts List file, which has details of all changes For More Information Please contact your local sales office for additional information about Cypress products and solutions. About Cypress Cypress is the leader in advanced embedded system solutions for the world s most innovative automotive, industrial, smart home appliances, consumer electronics and medical products. Cypress microcontrollers, analog ICs, wireless and USB-based connectivity solutions and reliable, high-performance memories help engineers design differentiated products and get them to market first. Cypress is committed to providing customers with the best support and development resources on the planet enabling them to disrupt markets by creating new product categories in record time. To learn more, go to www.cypress.com. MB9B410R Series 32-bit Arm Cortex -M3 FM3 Microcontroller The MB9B410R Series are highly integrated 32-bit microcontrollers dedicated for embedded controllers with high-performance and competitive cost. These series are based on the Arm Cortex-M3 Processor with on-chip Flash memory and SRAM, and has 2 peripheral functions such as Motor Control Timers, ADCs and Communication Interfaces (CAN, UART, CSIO, I C, LIN). The products which are described in this data sheet are placed into TYPE4 product categories in FM3 Family Peripheral Manual. Features External Bus Interface 32-bit Arm Cortex-M3 Core Supports SRAM, NOR and NAND Flash device Processor version: r2p1 Up to 144MHz Frequency Operation Up to 8 chip selects Memory Protection Unit (MPU): improves the reliability of an 8-/16-bit Data width embedded system Up to 25-bit Address bit Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48 peripheral interrupts Maximum area size: Up to 256 Mbytes and 16 priority levels Supports Address/Data multiplex 24-bit System timer (Sys Tick): System timer for OS task Supports external RDY input management CAN Interface (Max two channels) On-chip Memories Compatible with CAN Specification 2.0A/B Flash memory Maximum transfer rate: 1 Mbps These series are based on two independent on-chip Flash Built-in 32 message buffer memories. MainFlash Multi-function Serial Interface (Max eight channels) Up to 512 Kbyte Built-in Flash Accelerator System with 16 Kbyte trace 4 channels with 16 steps9-bit FIFO (ch.4 to ch.7), buffer memory 4 channels without FIFO (ch.0 to ch.3) The read access to Flash memory can be achieved without wait cycle up to operation frequency of 72 MHz. Even at Operation mode is selectable from the followings for each the operation frequency more than 72 MHz, an equivalent channel. access to Flash memory can be obtained by Flash UART Accelerator System. CSIO Security function for code protection LIN WorkFlash 2 I C 32 Kbyte UART Read cycle Full-duplex double buffer 4 wait-cycle: the operation frequency more than 72 MHz Selection with or without parity supported 2 wait-cycle: the operation frequency more than 40 MHz, Built-in dedicated baud rate generator and to 72 MHz External clock available as a serial clock 0 wait-cycle: the operation frequency to 40 MHz Hardware Flow control: Automatically control the Security function is shared with code protection transmission by CTS/RTS (only ch.4) SRAM Various error detect functions available (parity errors, framing errors, and overrun errors) This Series contain a total of up to 64 Kbyte on-chip SRAM. CSIO This is composed of two independent SRAM (SRAM0, Full-duplex double buffer SRAM1). SRAM0 is connected to I-code bus and D-code bus Built-in dedicated baud rate generator of Cortex-M3 core. SRAM1 is connected to System bus. Overrun error detect function available SRAM0: Up to 32 Kbyte SRAM1: Up to 32 Kbyte Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 002-05615 Rev. *D Revised February 9, 2018