TCA785 Infineon

TCA 785 Phase Control IC TCA 785 Pb-free lead plating RoHS compliant Bipolar IC Features Reliable recognition of zero passage Large application scope May be used as zero point switch LSL compatible Three-phase operation possible (3 ICs) Output current 250 mA Large ramp current range PG-DIP-16-1 Wide temperature range Type Ordering Code Package TCA 785 Q67000-A2321 PG-DIP-16-1 This phase control IC is intended to control thyristors, triacs, and transistors. The trigger pulses can be shifted within a phase angle between 0 and 180 . Typical applications include converter circuits, AC controllers and three-phase current controllers. This IC replaces the previous types TCA 780 and TCA 780 D. Pin Definitions and Functions Pin Symbol Function 1 GND Ground 2 Q2 Output 2 inverted 3 Q U Output U 4 Q2 Output 1 inverted 5 VSYNC Synchronous voltage 6 I Inhibit 7 Q Z Output Z 8 V REF Stabilized voltage 9 R9 Ramp resistance 10 C10 Ramp capacitance 11 V11 Control voltage 12 C12 Pulse extension 13 L Long pulse 14 Q 1 Output 1 15 Q 2 Output 2 Pin Configuration 16 VS Supply voltage (top view) 02.05 Semiconductor Group 1 TCA 785 Functional Description The synchronization signal is obtained via a high-ohmic resistance from the line voltage (voltage V5). A zero voltage detector evaluates the zero passages and transfers them to the synchronization register. This synchronization register controls a ramp generator, the capacitor C10 of which is charged by a constant current (determined by R9). If the ramp voltage V10 exceeds the control voltage V11 (triggering angle ), a signal is processed to the logic. Dependent on the magnitude of the control voltage V11, the triggering angle can be shifted within a phase angle of 0 to 180. For every half wave, a positive pulse of approx. 30 s duration appears at the outputs Q 1 and Q 2. The pulse duration can be prolonged up to 180 via a capacitor C12. If pin 12 is connected to ground, pulses with a duration between and 180 will result. Q 1 Q 2 Outputs and supply the inverse signals of Q 1 and Q 2. A signal of +180 which can be used for controlling an external logic,is available at pin 3. A signal which corresponds to the NOR link of Q 1 and Q 2 is available at output Q Z (pin 7). Q 1 Q 2 The inhibit input can be used to disable outputs Q1, Q2 and , . Q 1 Q 2 Pin 13 can be used to extend the outputs and to full pulse length (180 ). Block Diagram Semiconductor Group 2