1. Cyclone IV FPGA Device Family
Overview
March 2016
CYIV-51001-2.0
CYIV-51001-2.0
Alteras new Cyclone IV FPGA device family extends the Cyclone FPGA series
leadership in providing the markets lowest-cost, lowest-power FPGAs, now with a
transceiver variant. Cyclone IV devices are targeted to high-volume, cost-sensitive
applications, enabling system designers to meet increasing bandwidth requirements
while lowering costs.
Built on an optimized low-power process, the Cyclone IV device family offers the
following two variants:
Cyclone IV Elowest power, high functionality with the lowest cost
Cyclone IV GXlowest power and lowest cost FPGAs with 3.125 Gbps
transceivers
1 Cyclone IV E devices are offered in core voltage of 1.0 V and 1.2 V.
f For more information, refer to the Power Requirements for Cyclone IV Devices
chapter.
Providing power and cost savings without sacrificing performance, along with a
low-cost integrated transceiver option, Cyclone IV devices are ideal for low-cost,
small-form-factor applications in the wireless, wireline, broadcast, industrial,
consumer, and communications industries.
Cyclone IV Device Family Features
The Cyclone IV device family offers the following features:
Low-cost, low-power FPGA fabric:
6K to 150K logic elements
Up to 6.3 Mb of embedded memory
Up to 360 18 18 multipliers for DSP processing intensive applications
Protocol bridging applications for under 1.5 W total power
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Cyclone IV Device Handbook,
Volume 1
March 2016
Feedback Subscribe12 Chapter 1: Cyclone IV FPGA Device Family Overview
Cyclone IV Device Family Features
Cyclone IV GX devices offer up to eight high-speed transceivers that provide:
Data rates up to 3.125 Gbps
8B/10B encoder/decoder
8-bit or 10-bit physical media attachment (PMA) to physical coding sublayer
(PCS) interface
Byte serializer/deserializer (SERDES)
Word aligner
Rate matching FIFO
TX bit slipper for Common Public Radio Interface (CPRI)
Electrical idle
Dynamic channel reconfiguration allowing you to change data rates and
protocols on-the-fly
Static equalization and pre-emphasis for superior signal integrity
150 mW per channel power consumption
Flexible clocking structure to support multiple protocols in a single transceiver
block
Cyclone IV GX devices offer dedicated hard IP for PCI Express (PIPE) (PCIe)
Gen 1:
1, 2, and 4 lane configurations
End-point and root-port configurations
Up to 256-byte payload
One virtual channel
2 KB retry buffer
4 KB receiver (Rx) buffer
Cyclone IV GX devices offer a wide range of protocol support:
PCIe (PIPE) Gen 1 1, 2, and 4 (2.5 Gbps)
Gigabit Ethernet (1.25 Gbps)
CPRI (up to 3.072 Gbps)
XAUI (3.125 Gbps)
Triple rate serial digital interface (SDI) (up to 2.97 Gbps)
Serial RapidIO (3.125 Gbps)
Basic mode (up to 3.125 Gbps)
V-by-One (up to 3.0 Gbps)
DisplayPort (2.7 Gbps)
Serial Advanced Technology Attachment (SATA) (up to 3.0 Gbps)
OBSAI (up to 3.072 Gbps)
Cyclone IV Device Handbook, March 2016 Altera Corporation
Volume 1