LatticeXP Family Data Sheet DS1001 Version 05.1, November 2007LatticeXP Family Data Sheet Introduction July 2007 Data Sheet DS1001 Flexible I/O Buffer Features Programmable sysIO buffer supports wide Non-volatile, Infinitely Reconfigurable range of interfaces: Instant-on powers up in microseconds LVCMOS 3.3/2.5/1.8/1.5/1.2 No external configuration memory LVTTL Excellent design security, no bit stream to SSTL 18 Class I intercept SSTL 3/2 Class I, II Reconfigure SRAM based logic in milliseconds HSTL15 Class I, III SRAM and non-volatile memory programmable HSTL 18 Class I, II, III through system configuration and JTAG ports PCI Sleep Mode LVDS, Bus-LVDS, LVPECL, RSDS Allows up to 1000x static current reduction Dedicated DDR Memory Support TransFR Reconfiguration (TFR) Implements interface up to DDR333 (166MHz) In-field logic update while system operates sysCLOCK PLLs Extensive Density and Package Options Up to 4 analog PLLs per device 3.1K to 19.7K LUT4s Clock multiply, divide and phase shifting 62 to 340 I/Os System Level Support Density migration supported IEEE Standard 1149.1 Boundary Scan, plus Embedded and Distributed Memory ispTRACY internal logic analyzer capability 54 Kbits to 396 Kbits sysMEM Embedded Onboard oscillator for configuration Block RAM Devices operate with 3.3V, 2.5V, 1.8V or 1.2V Up to 79 Kbits distributed RAM power supply Flexible memory resources: Distributed and block memory Table 1-1. LatticeXP Family Selection Guide Device LFXP3 LFXP6 LFXP10 LFXP15 LFXP20 PFU/PFF Rows 16 24 32 40 44 PFU/PFF Columns 2430384856 PFU/PFF (Total) 384 720 1216 1932 2464 LUTs (K) 3 6 101520 Distributed RAM (KBits) 1223396179 EBR SRAM (KBits) 54 72 216 324 396 EBR SRAM Blocks 6 8 24 36 44 V Voltage 1.2/1.8/2.5/3.3V 1.2/1.8/2.5/3.3V 1.2/1.8/2.5/3.3V 1.2/1.8/2.5/3.3V 1.2/1.8/2.5/3.3V CC PLLs 22444 Max. I/O 136 188 244 300 340 Packages and I/O Combinations: 100-pin TQFP (14 x 14 mm) 62 144-pin TQFP (20 x 20 mm) 100 100 208-pin PQFP (28 x 28 mm) 136 142 256-ball fpBGA (17 x 17 mm) 188 188 188 188 388-ball fpBGA (23 x 23 mm) 244 268 268 484-ball fpBGA (23 x 23 mm) 300 340 2007 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. www.latticesemi.com 1-1 DS1001 Introduction 01.5