IS42VM16100G 512K x 16Bits x 2Banks Low Power Synchronous DRAM Description These IS42VM16100G is a low power 16,777,216 bits CMOS Synchronous DRAM organized as 2 banks of 524,288 words x 16 bits. These products are offering fully synchronous operation and are referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve high bandwidth. All input and output voltage levels are compatible with LVCMOS. Features JEDEC standard 1.8V power supply. All inputs and outputs referenced to the positive edge of the Auto refresh and self refresh. system clock. All pins are compatible with LVCMOS interface. Data mask function by DQM. 4K refresh cycle / 64ms. Internal dual banks operation. Programmable Burst Length and Burst Type. Burst Read Single Write operation. - 1, 2, 4, 8 or Full Page for Sequential Burst. Special Function Support. - 4 or 8 for Interleave Burst. - PASR(Partial Array Self Refresh) Programmable CAS Latency : 2,3 clocks. - Auto TCSR(Temperature Compensated Self Refresh) Programmable Driver Strength Control Automatic precharge, includes CONCURRENT Auto Precharge - Full Strength or 1/2, 1/4 of Full Strength Mode and controlled Precharge. Deep Power Down Mode. Copyright 2010 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized b.) the user assume all such risks and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances 1 Rev.A Mar. 2011 www.issi.comIS42VM16100G Figure1: 60Ball FBGA Ball Assignment 1 2 3 4 5 6 7 A VSS DQ15 DQ0 VDD B DQ14 VSSQ VDDQ DQ1 C DQ13 VDDQ VSSQ DQ2 D DQ12 DQ11 DQ4 DQ3 E DQ10 VSSQ VDDQ DQ5 F DQ9 VDDQ VSSQ DQ6 G DQ8 NC NC DQ7 H NC NC NC NC J NC UDQM LDQM /WE K NC CLK /RAS /CAS L CKE NC NC /CS M A11 A9 NC NC N A8 A7 A0 A10 P A6 A5 A2 A1 R VSS A4 A3 VDD Top View 2 Rev.A Mar. 2011 www.issi.com