IS42/45SM/RM/VM32100D 512K x 32Bits x 2Banks Low Power Synchronous DRAM Description These IS42SM/RM/VM32100D are low power 33,554,432 bits CMOS Synchronous DRAM organized as 2 banks of 524,288 words x 32 bits. These products are offering fully synchronous operation and are referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve high bandwidth. All input and output voltage levels are compatible with LVCMOS. Features JEDEC standard 3.3V, 2.5V, 1.8V power supply. All inputs and outputs referenced to the positive edge of the Auto refresh and self refresh. system clock. All pins are compatible with LVCMOS interface. Data mask function by DQM. 4K refresh cycle / 64ms. Internal dual banks operation. Programmable Burst Length and Burst Type. Burst Read Single Write operation. - 1, 2, 4, 8 or Full Page for Sequential Burst. Special Function Support. - 4 or 8 for Interleave Burst. - PASR(Partial Array Self Refresh) Programmable CAS Latency : 2,3 clocks. - Auto TCSR(Temperature Compensated Self Refresh) Programmable Driver Strength Control - Full Strength or 1/2, 1/4, of Full Strength Deep Power Down Mode. Automatic precharge, includes CONCURRENT Auto Precharge Mode and controlled Precharge. Copyright 2015 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized b.) the user assume all such risks and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances 1 www.issi.com - dram issi.com Rev. A November 2015 IS42/45SM/RM/VM32100D Figure1: 90Ball FBGA Ball Assignment 1 2 3 4 5 6 7 8 9 A DQ26 DQ24 VDD DQ23 DQ21 VSS B DQ28 VDDQ VDDQ VSSQ DQ19 VSSQ C VSSQ DQ27 DQ22 DQ20 VDDQ DQ25 D VSSQ DQ29 DQ17 DQ18 VDDQ DQ30 E VDDQ DQ31 NC DQ16 VSSQ NC F VSS DQM3 A2 DQM2 VDD A3 G A4 A5 A10 A0 A1 A6 H A7 A8 NC NC NC NC J CLK CKE BA /CS /RAS A9 K DQM1 NC /CAS /WE DQM0 NC L VDD VDDQ DQ8 DQ7 VSSQ VSS M VSSQ DQ10 DQ6 DQ5 VDDQ DQ9 N VSSQ DQ12 DQ1 DQ3 VDDQ DQ14 P VDDQ DQ11 VDDQ VSSQ DQ4 VSSQ R VDD DQ13 DQ15 DQ0 DQ2 VSS Top View 2 www.issi.com - dram issi.com Rev. A November 2015