IS43/46DR81280A,IS43/46DR16640A SEPTEMBER2011 1Gb (x8, x16) DDR2 SDRAM FEATURES Clockfrequencyupto400MHz BidirectionaldifferentialDataStrobe(Single 8internalbanksforconcurrentoperation endeddatastrobeisanoptionalfeature) 4bitprefetcharchitecture OnChipDLLalignsDQandDQstransitionswith CKtransitions ProgrammableCASLatency:3,4,5,6and7 DQS canbedisabledforsingleendeddata ProgrammableAdditiveLatency:0,1,2,3,4,5 strobe and6 ReadDataStrobesupported(x8only) WriteLatency=ReadLatency1 DifferentialclockinputsCKandCK ProgrammableBurstSequence:Sequentialor Interleave VDDandVDDQ=1.8V0.1V ProgrammableBurstLength:4and8 PASR(PartialArraySelfRefresh) AutomaticandControlledPrechargeCommand SSTL 18interface PowerDownMode tRASlockoutsupported AutoRefreshandSelfRefresh Operatingtemperature: Commercial(T =0Cto70C T =0Cto85C) RefreshInterval:7.8 s(8192cycles/64ms) A C Industrial(T =40Cto85C T =40Cto95C) A C OCD(OffChipDriverImpedanceAdjustment) Automotive,A1(T =40Cto85C T =40Cto95C) A C ODT(OnDieTermination) Automotive,A2(T =40Cto105C T =40Cto A C WeakStrengthDataOutputDriverOption 105C) OPTIONS Configuration: ADDRESSTABLE 128Mx8(16Mx8x8banks) Parameter 128Mx8 64Mx16 64Mx16(8Mx16x8banks) RowAddressing A0A13 A0A12 Package: ColumnAddressing A0A9 A0A9 60ballTWBGAforx8 BankAddressing BA0BA2 BA0BA2 84ballTWBGAforx16 PrechargeAddressing A10 A10 ClockCycleTiming 37C 3D 25E 25D Units SpeedGrade DDR2533C DDR2667D DDR2800E DDR2800D CLtRCDtRP 444 555 666 555 tCK tCK(CL=3) 5 5 5 5 ns tCK(CL=4) 3.75 3.75 3.75 3.75 ns tCK(CL=5) 3.75 3 3 2.5 ns tCK(CL=6) 3.75 3 2.5 2.5 ns tCK(CL=7) 3.75 3 2.5 2.5 ns Frequency(max) 266 333 400 400 MHz Note:The37Cdevicespecificationisshownforreferenceonly. Copyright 2011 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized b.) the user assume all such risks and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. www.issi.com 1 Rev. D, 08/30/2011 IS43/46DR81280A,IS43/46DR16640A PackageBalloutandDescription DDR2SDRAM(128Mx8)TWBGABallout(TopView)(8.00mmx13.65mmBody,0.8mmpitch) Symbol Description Notes: 1.PinsB3andA2haveidenticalcapacitanceaspinsB7 CK,CK Inputclocks andA8. CKE Clockenable 2.Foraread,whenenabled,strobepairRDQS&RDQS CS ChipSelect areidenticalinfunctionandtimingtostrobepairDQS& DQS andinputmaskingfunctionisdisabled. RAS ,CAS ,WE Commandcontrolpins 3.ThefunctionofDMorRDQS/RDQS areenabledby A 13:0 Address EMRScommand. BA 2:0 BankAddress 4.VDDLandVSSDLarepowerandgroundfortheDLL. DQ 7:0 I/O DQS,DQS DataStrobe RDQS,RDQS RedundantDataStrobe DM Inputdatamask VDD Supplyvoltage VSS Ground VDDQ DQpowersupply VSSQ DQground VREF Referencevoltage VDDL DLLpowersupply VSSDL DLLground ODT OnDieTerminationEnable NC Noconnect Integrated Silicon Solution, Inc. www.issi.com 2 Rev. D, 08/30/2011