IS43/46TR16128C, IS43/46TR16128CL, IS43/46TR82560C, IS43/46TR82560CL 256Mx8, 128Mx16 2Gb DDR3 SDRAM AUGUST 2018 FEATURES Standard Voltage: VDD and VDDQ = 1.5V 0.075V Refresh Interval: 7.8 us (8192 cycles/64 ms) Tc= -40C to 85C Low Voltage (L): VDD and VDDQ = 1.35V + 0.1V, -0.067V - Backward compatible to 1.5V 3.9 us (8192 cycles/32 ms) Tc= 85C to 105C Partial Array Self Refresh High speed data transfer rates with system frequency up to 933 MHz Asynchronous RESET pin 8 internal banks for concurrent operation TDQS (Termination Data Strobe) supported (x8 only) 8n-Bit pre-fetch architecture OCD (Off-Chip Driver Impedance Adjustment) Programmable CAS Latency Dynamic ODT (On-Die Termination) Programmable Additive Latency: 0, CL-1,CL-2 Driver strength : RZQ/7, RZQ/6 (RZQ = 240 ) Programmable CAS WRITE latency (CWL) based on tCK Write Leveling Programmable Burst Length: 4 and 8 Up to 200 MHz in DLL off mode Programmable Burst Sequence: Sequential or Operating temperature: Interleave Commercial (TC = 0C to +95C) BL switch on the fly Industrial (T = -40C to +95C) C Auto Self Refresh(ASR) Automotive, A1 (TC = -40C to +95C) Self Refresh Temperature(SRT) Automotive, A2 (T = -40C to +105C) C ADDRESS TABLE OPTIONS Parameter 256Mx8 128Mx16 Configuration: Row Addressing A0-A14 A0-A13 256Mx8 Column Addressing A0-A9 A0-A9 128Mx16 Bank Addressing BA0-2 BA0-2 Package: Page size 1KB 2KB 96-ball BGA (9mm x 13mm) for x16 Auto Precharge 78-ball BGA (8mm x 10.5mm) for x8 A10/AP A10/AP Addressing BL switch on the fly A12/BC A12/BC SPEED BIN Speed Option 15H 125K 107M Units JEDEC Speed Grade DDR3-1333H DDR3-1600K DDR3-1866M CL-nRCD-nRP 9-9-9 11-11-11 13-13-13 tCK tRCD,tRP(min) 13.5 13.75 13.91 ns Note: Faster speed options are backward compatible to slower speed options. Copyright 2018 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized b.) the user assume all such risks and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. www.issi.com 1 Rev. E2 08/22/2018 IS43/46TR16128C, IS43/46TR16128CL, IS43/46TR82560C, IS43/46TR82560CL 1. DDR3 PACKAGE BALLOUT 1.1 DDR3 SDRAM package ballout 78-ball BGA x8 1 2 3 4 5 6 7 8 9 A VSS VDD NC NU/TDQS VSS VDD B VSS VSSQ DQ0 DM/TDQS VSSQ VDDQ C VDDQ DQ2 DQS DQ1 DQ3 VSSQ D VSSQ DQ6 DQS VDD VSS VSSQ E VREFDQ VDDQ DQ4 DQ7 DQ5 VDDQ 1 F NC VSS RAS CK VSS NC G ODT VDD CAS CK VDD CKE H NC CS WE A10/AP ZQ NC J VSS BA0 BA2 NC(A15) VREFCA VSS K VDD A3 A0 A12/BC BA1 VDD L VSS A5 A2 A1 A4 VSS M VDD A7 A9 A11 A6 VDD N VSS RESET A13 A14 A8 VSS Note: NC balls have no internal connection. NC(A15) is one of NC pins and reserved for higher densities. Integrated Silicon Solution, Inc. www.issi.com 2 Rev. E2 08/22/2018