IS43/46TR16640C, IS43/46TR16640CL IS43/46TR81280C, IS43/46TR81280CL 128MX8, 64MX16 1Gb DDR3 SDRAM DECEMBER 2020 FEATURES Standard Voltage: V and V = 1.5V 0.075V DD DDQ Partial Array Self Refresh Low Voltage (L): V and V = 1.35V + 0.1V, -0.067V DD DDQ - Backward compatible to 1.5V Asynchronous RESET pin High speed data transfer rates with system TDQS (Termination Data Strobe) supported (x8 frequency up to 933 MHz only) 8 internal banks for concurrent operation OCD (Off-Chip Driver Impedance Adjustment) 8n-bit pre-fetch architecture Dynamic ODT (On-Die Termination) Programmable CAS Latency Driver strength : RZQ/7, RZQ/6 (RZQ = 240 ) Programmable Additive Latency: 0, CL-1,CL-2 Write Leveling Programmable CAS WRITE latency (CWL) based Up to 200 MHz in DLL off mode on tCK Operating temperature: Programmable Burst Length: 4 and 8 Commercial (T = 0C to +95C) C Programmable Burst Sequence: Sequential or Industrial (TC = -40C to +95C) Interleave Automotive, A1 (T = -40C to +95C) C BL switch on the fly Automotive, A2 (TC = -40C to +105C) Auto Self Refresh(ASR) Automotive, A25 (T = -40C to +115C) C Automotive, A3 (TC = -40C to +125C) Self Refresh Temperature(SRT) Refresh Interval: 7.8 s (8192 cycles/64 ms) Tc= -40C to 85C 3.9 s (8192 cycles/32 ms) Tc= 85C to 105C 1.95 s (8192 cycles/16 ms) Tc= 105C to 115C 0.97 s (8192 cycles/8 ms) Tc= 115C to 125C OPTIONS ADDRESS TABLE Configuration: Parameter 128Mx8 64Mx16 128Mx8 Row Addressing A0-A13 A0-A12 64Mx16 Column Addressing A0-A9 A0-A9 Package: Bank Addressing BA0-2 BA0-2 96-ball BGA (9mm x 13mm) for x16 Page size 1KB 2KB 78-ball BGA (8mm x 10.5mm) for x8 Auto Precharge Addressing A10/AP A10/AP BL switch on the fly A12/BC A12/BC SPEED BIN Speed Option 125J 107M Units JEDEC Speed Grade DDR3-1600J DDR3-1866M CL-nRCD-nRP 10-10-10 13-13-13 tCK tRCD,tRP(min) 12.5 13.91 ns Note: Faster speed options may be backward compatible to slower speed options. Refer to timing tables (8.3) Copyright 2020 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized b.) the user assume all such risks and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances Integrated Silicon Solution, Inc. www.issi.com 1 Rev. B2 12/17/2020 IS43/46TR16640C, IS43/46TR16640CL IS43/46TR81280C, IS43/46TR81280CL 1. DDR3 PACKAGE BALLOUT 1.1 DDR3 SDRAM package ballout 78-ball BGA x8 1 2 3 4 5 6 7 8 9 A VSS VDD NC NU/TDQS VSS VDD B VSS VSSQ DQ0 DM/TDQS VSSQ VDDQ C VDDQ DQ2 DQS DQ1 DQ3 VSSQ D VSSQ DQ6 DQS VDD VSS VSSQ E VREFDQ VDDQ DQ4 DQ7 DQ5 VDDQ 1 F NC VSS RAS CK VSS NC G ODT VDD CAS CK VDD CKE H NC CS WE A10/AP ZQ NC J VSS BA0 BA2 NC(A15) VREFCA VSS K VDD A3 A0 A12/BC BA1 VDD L VSS A5 A2 A1 A4 VSS M VDD A7 A9 A11 A6 VDD N VSS RESET A13 NC(A14) A8 VSS Note: NC balls have no internal connection. NC(A14) and NC(A15) are NC pins and reserved for higher densities. 1.2 DDR3 SDRAM package ballout 96-ball BGA x16 1 2 3 4 5 6 7 8 9 A VDDQ DQU5 DQU7 DQU4 VDDQ VSS B VSSQ VDD VSS DQSU DQU6 VSSQ C VDDQ DQU3 DQU1 DQSU DQU2 VDDQ D VSSQ VDDQ DMU DQU0 VSSQ VDD E VSS VSSQ DQL0 DML VSSQ VDDQ F VDDQ DQL2 DQSL DQL1 DQL3 VSSQ G VSSQ DQL6 DQSL VDD VSS VSSQ H VREFDQ VDDQ DQL4 DQL7 DQL5 VDDQ J NC VSS RAS CK VSS NC K ODT VDD CAS CK VDD CKE L NC CS WE A10/AP ZQ NC M VSS BA0 BA2 NC(A15) VREFCA VSS N VDD A3 A0 A12/BC BA1 VDD P VSS A5 A2 A1 A4 VSS R VDD A7 A9 A11 A6 VDD T VSS RESET NC(A13) NC(A14) A8 VSS Note: NC balls have no internal connection. NC(A13), NC(A14) and NC(A15) are NC pins and reserved for higher densities. Integrated Silicon Solution, Inc. www.issi.com 2 Rev. B2 12/17/2020