CPC7593 Line Card Access Switch INTEGRATED CIRCUITS DIVISION Features Description TTL Logic Level Inputs for 3.3V Logic Interfaces The CPC7593 is a member of IXYS Integrated Smart Logic for Power Up / Hot Plug State Control Circuits Divisions next generation Line Card Access Improved Switch dV/dt Immunity of 500 V/s Switch (LCAS) family. This monolithic 10-pole line Small 20-pin or 28-pin SOIC Packages card access switch is available in 20-pin and 28-pin Monolithic IC Reliability SOIC packages. It provides the necessary functions to Low, Matched, R replace three 2-Form-C electromechanical relays on ON analog line cards or combined voice and data line Eliminates the Need for Zero-cross Switching cards found in central office, access, and PBX Flexible Switch Timing for Transition from Ringing equipment. The device contains solid state switches Mode to Talk Mode. for tip and ring line break, ringing injection, and test Clean, Bounce-Free Switching access. The CPC7593 requires only a +5 V supply SLIC Tertiary Protection Via Integrated Current and provides stable start up conditioning during Limiting, Voltage Clamping, and Thermal Shutdown system power up and for hot plug insertion 5V Operation with Power Consumption < 10.5 mW applications. Once active, the inputs respond to Intelligent Battery Monitor traditional TTL logic levels enabling the CPC7593 to Logic-Level Inputs, no External Drive Circuitry be used with 3.3V only logic. Required Applications Ordering Information Standard voice linecards CPC7593 part numbers are specified as shown here: Integrated Voice and Data (IVD) linecards B - 28-pin SOIC delivered 29/Tube, 1000/Reel Central office (CO) Z - 20-pin SOIC delivered 40/Tube, 1000/Reel Digital Loop Carrier (DLC) PBX Systems CPC7593 x x xx Digitally Added Main Line (DAML) TR - Add for Tape & Reel Version Hybrid Fiber Coax (HFC) Fiber in the Loop (FITL) A - With Protection SCR B - Without Protection SCR Pair Gain System C - With Protection SCR and with Extra Logic State Channel Banks Pb e 3 Figure 1. CPC7593 Block Diagram T (T ) CHANTEST TESTin T (T ) +5Vdc TESTout DROPTEST T 10 8 RINGING 5 12 V DD SW7 CPC7593 X SW5 Tip XXSW3 SW9 X T 7 6 T LINE BAT X SW1 Secondary SLIC Protection Ring SW2 R 22 23 R LINE BAT X 17 IN TESTin L SW4 SW10 XSW6 X X SCR 16 Switch A IN RINGING V REF Trip 15 Control T IN TESTout Circuit Logic C X 18 H LATCH SW8 19 20 R 24 1 14 13 28 R (R ) RINGING TESTout DROPTEST F T GND SD D GND 300 (min.) V BAT RINGING V NOTE 1: Pin assignments are for the 28 pin package. BAT R (R ) TESTin CHANTEST NOTE 2: Block diagram shown with the optional protection SCR. DS-CPC7593-R05 www.ixysic.com 1CPC7593 INTEGRATED CIRCUITS DIVISION 1. Specifications 3 1.1 Package Pinout . 3 1.2 Pinout . 3 1.3 Absolute Maximum Ratings 4 1.4 ESD Rating 4 1.5 General Conditions 4 1.6 Switch Specifications . 5 1.6.1 Break Switches, SW1 and SW2 . 5 1.6.2 Ringing Return Switch, SW3 6 1.6.3 Ringing Switch, SW4 . 7 1.6.4 TESTout Switches, SW5 and SW6 . 8 1.6.5 Ringing Test Return Switch, SW7 9 1.6.6 Ringing Test Switch, SW8 10 1.6.7 TESTin Switches, SW9 and SW10 11 1.7 Digital I/O Electrical Specifications . 12 1.8 Voltage and Power Specifications 13 1.9 Protection Circuitry Electrical Specifications 13 1.10 Truth Tables 14 1.10.1 Truth Table for CPC7593xA and CPC7593xB 14 1.10.2 Truth Table for CPC7593xC and CPC7593xD 14 2. Functional Description 15 2.1 Introduction . 15 2.2 Under Voltage Switch Lock Out Circuitry . 15 2.2.1 Introduction 15 2.2.2 Hot Plug and Power Up Circuit Design Considerations 16 2.3 Switch Logic . 16 2.3.1 Start-up . 16 2.3.2 Switch Timing 16 2.3.3 Make-Before-Break Operation . 17 2.3.4 Make-Before-Break Operation Logic Table (Ringing to Talk Transition) . 17 2.3.5 Break-Before-Make Operation . 17 2.3.6 Break-Before-Make Operation Logic Table (Ringing to Talk Transition) . 18 2.3.7 Alternate Break-Before-Make Operation 18 2.3.8 Alternate Break-Before-Make Operation Logic Table (Ringing to Talk Transition) 19 2.4 Data Latch 19 2.5 T Pin Description . 19 SD 2.6 Ringing Switch Zero-Cross Current Turn Off 19 2.7 Power Supplies 20 2.8 Battery Voltage Monitor 20 2.9 Protection . 20 2.9.1 Diode Bridge/SCR . 20 2.9.2 Current Limiting function 20 2.10 Thermal Shutdown . 21 2.11 External Protection Elements . 21 3. Manufacturing Information . 22 3.1 Moisture Sensitivity . 22 3.2 ESD Sensitivity 22 3.3 Reflow Profile 22 3.4 Board Wash . 22 3.5 Mechanical Dimensions 23 3.5.1 CPC7593Zx 20-Pin SOIC Package . 23 3.5.2 CPC7593Bx 28-Pin SOIC Package . 23 3.6 Tape and Reel Specifications . 24 3.6.1 CPC7593ZxTR Tape & Reel . 24 3.6.2 CPC7593BxTR Tape & Reel 24 2 www.ixysic.com R05