t KTD2151 Programmable Dual Output LCD Bias Power Features Brief Description Input voltage range (2.7V to 5.5V) The KTD2151 is a TFT-LCD power supply IC for small and Dual output regulator with single inductor medium size displays for smartphones and tablets. The High efficiency above 85% positive and negative output rails provide bias supplies for Charge pump with PFM mode at light load TFT LCD panels via the Source Driver IC. The device only Programmable output voltages requires a single inductor, to reduce the total PCB area. Positive output voltage range It features an integrated step-up DC-DC converter with +4.0V to +6.3V (100mV/step) input voltage range from 2.7V to 5.5V. An LDO and charge Negative output voltage range pump generate dual regulated outputs, whose voltages -4.0V to -6.3V (100mV/step) 2 can be programmed via an I C compatible interface. Programmable regulator offset voltage Optimized step-up, LDO and charge pump converters 1.0% output voltage accuracy maximize conversion efficiency, exceeding 85%. Regulated output current up to 80mA Programmable active discharge KTD2151 integrates all compensation and soft-start 2 I C compatible interface circuitry, which results in a simpler and smaller solution 1 A shutdown supply current with much fewer external components. High switching Pb-free WLCSP-15 and TDFN-14 packages frequency (1.8MHz) allows the use of a smaller inductor RoHS and Green Compliant and capacitor to further reduce the solution size. -40C to +85C Temperature Range 2 The I C compatible interface allows control of the positive and negative outputs from +4.0V to +6.3V and from -4.0V to -6.3V, respectively, as well as programming additional Applications registers on the device. Smartphone TFT-LCD KTD2151 is available in a RoHS and Green compliant 15- Tablet TFT-LCD bump 2.2mm x 1.45mm x 0.62mm WLCSP and 14-lead General Dual Power Supply Applications TDFN 2.5 x 3.0 x 0.75mm. Typical Application L V IN 2.7V to 5.5V 4.7H C IN 4.7F VIN SW Positive Enable ENP V POS OUTP +5.0V C POS Negative Enable ENN 4.7F 2 I C Interface Clock SCL REG 2 I C Interface Data SDA C REG 4.7F CFLY1 C FLY V NEG 2.2F OUTN -5.0V CFLY2 C NEG 4.7F AGND PGND April 2020 Revision 04f Page 1 Company Confidential XX YYZ t KTD2151 Pin Descriptions Pin Pin Name Function (WLCSP-15) (TDFN-14) A1 14 ENN Enable input pin for negative output (OUTN) A2 1 OUTN Charge pump output pin of the negative power A3 2 CFLY2 Negative charge pump flying capacitor pin B1 12 ENP Enable input pin for positive power (OUTP) B2 13 SCL SCL Clock input pin of the IC interface B3, E1 3, 8 PGND Power GND connection C1 10 VIN Input supply pin for the IC C2 11 SDA SDA bi-direction data pin of the IC interface C3 4 CFLY1 Negative charge pump flying capacitor pin D1 9 SW Switch node pin of step-up converter D2 5 AGND Analog ground D3, E2 6 REG Step-up converter output pin E3 7 OUTP Positive LDO output pin WLCSP-15 TDFN-14 TOP VIEW TOP VIEW Top View OUTN 1 14 ENN A ENN OUTN CFLY2 CFLY2 2 13 SCL B ENP SCL PGND PGND 3 12 ENP CFLY1 4 11 SDA C VIN SDA CFLY1 AGND 5 10 VIN D SW AGND REG REG 6 9 SW OUTP 7 8 PGND E PGND REG OUTP 1 2 3 15-Bump 2.2mm x 1.45mm x 0.62mm WLCSP Package Top Mark XX = Device Code YY = Date Code, Z = Assembly Code April 2020 Revision 04f Page 2 Company Confidential