DAFIR-GEN-XM-UT2 Lattice

DA-FIR Filter Generator Users Guide August 2010 IPUG58 01.6Table of Contents Chapter 1. Introduction .......................................................................................................................... 4 Quick Facts ........................................................................................................................................................... 4 Features ................................................................................................................................................................ 5 Chapter 2. Functional Description ........................................................................................................ 6 General Description .............................................................................................................................................. 6 Functional Block Diagram ..................................................................................................................................... 7 DA-FIR Filter IP Core I/O ...................................................................................................................................... 7 Data Path ..................................................................................................................................................... 8 Coefficient Memory ...................................................................................................................................... 9 Architecture Optimizations ........................................................................................................................... 9 Configuring the DA-FIR Filter IP core ................................................................................................................. 10 Architecture Options................................................................................................................................... 10 I/O Specification Options............................................................................................................................ 11 Implementation Options ............................................................................................................................. 12 Interfacing with the DA-FIR Filter IP core............................................................................................................ 12 Timing Description .............................................................................................................................................. 12 Chapter 3. Parameter Settings ............................................................................................................ 15 Architecture Tab.................................................................................................................................................. 16 Filter Specifications.................................................................................................................................... 16 Coefficients Specifications ......................................................................................................................... 17 Throughput................................................................................................................................................. 17 I/O Specification Tab........................................................................................................................................... 18 Data............................................................................................................................................................ 18 Coefficients ................................................................................................................................................ 18 Output ........................................................................................................................................................ 19 Precision Control........................................................................................................................................ 19 I/O Specification Tab........................................................................................................................................... 19 Memory Type ............................................................................................................................................. 20 Performance............................................................................................................................................... 20 Synthesis Options ...................................................................................................................................... 20 Chapter 4. IP Core Generation............................................................................................................. 21 Licensing the IP Core.......................................................................................................................................... 21 Getting Started.................................................................................................................................................... 21 IPexpress-Created Files and Top Level Directory Structure............................................................................... 23 Instantiating the Core................................................................................................................................. 25 Running Functional Simulation .................................................................................................................. 25 Simulation Evaluation................................................................................................................................. 26 Synthesizing and Implementing the Core in a Top-Level Design .............................................................. 26 Implementation Evaluation......................................................................................................................... 27 Hardware Evaluation.................................................................................................................................. 27 Enabling Hardware Evaluation in Diamond................................................................................................ 28 Enabling Hardware Evaluation in ispLEVER.............................................................................................. 28 Updating/Regenerating the IP Core .................................................................................................................... 28 Regenerating an IP Core in Diamond ........................................................................................................ 28 Regenerating an IP Core in ispLEVER ...................................................................................................... 28 Chapter 5. Support Resources ............................................................................................................ 30 Lattice Technical Support.................................................................................................................................... 30 Online Forums............................................................................................................................................ 30 Telephone Support Hotline ........................................................................................................................ 30 2010 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. IPUG58 1.6 August 2010 2 DA-FIR Filter Generator Users Guide