FCRAM-ONE-XM-N1 Lattice

TM ispLever CORECORE FCRAM I IP Core Users Guide October 2005 ipug34 02.0 FCRAM I IP Core Lattice Semiconductor Users Guide Introduction Fast Cycle RAM (FCRAM) is a DRAM technology with a specialized memory core technology that achieves faster random access times and offers lower power consumption than traditional DRAMs. FCRAM is a trademark of Fujitsu Ltd., Japan. FCRAM technology is an attractive solution for applications that require DRAM densities, low power consumption and fast random cycle performance approaching SRAM speeds. Lattices FCRAM I controller core provides an ideal solution for interfacing a users application to FCRAM I technol- ogy. The core provides a simple user command interface on one side and a FCRAM I memory interface on the other side. The core handles all timing and control to the FCRAM I. It also checks the user commands for access violations and prevents bank collisions and read-write turnaround time violations. The core also incorporates a user congurable refresh controller that handles refreshes to the FCRAM I. This core allows designers to focus on the application rather than the FCRAM I interface resulting in a faster time to market. This users guide describes the FCRAM I controller core and explains how it can be implemented in Lattices pro- grammable device technologies. The FCRAM I controller core comes with the documents and les listed below: Data sheet Gate level netlist RTL simulation model Core instantiation template Features Supports 8- and 16-bit FCRAM I DDR interfaces for data Supports parameterizeable burst lengths of 2 or 4 Supports parameterizeable CAS latencies of 3 or 4 Supports controller initiated auto-refresh or user initiated auto/self-refresh Built-in initialization sequence automatically programs the FCRAM I with users settings Supports bi-directional DDR interface between the controller and FCRAM I (DQ and DQS). Supports a target FCRAM I DDR interface frequency of 154 to167 MHz in a LatticeEC, LatticeECP, or LatticeXP device 2