X-On Electronics has gained recognition as a prominent supplier of iCE40HX1K-TQ144 FPGA - Field Programmable Gate Array across the USA, India, Europe, Australia, and various other global locations. iCE40HX1K-TQ144 FPGA - Field Programmable Gate Array are a product manufactured by Lattice. We provide cost-effective solutions for FPGA - Field Programmable Gate Array, ensuring timely deliveries around the world.

iCE40HX1K-TQ144 Lattice

iCE40HX1K-TQ144 electronic component of Lattice
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Part No.iCE40HX1K-TQ144
Manufacturer: Lattice
Category: FPGA - Field Programmable Gate Array
Description: FPGA - Field Programmable Gate Array iCE40HX 1280 LUTs, 1.2V Ultra Low-Power
Datasheet: iCE40HX1K-TQ144 Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
1: USD 8.459 ea
Line Total: USD 8.46 
Availability - 1929
Ship by Tue. 26 Nov to Thu. 28 Nov
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
1929
Ship by Tue. 26 Nov to Thu. 28 Nov
MOQ : 1
Multiples : 1
1 : USD 8.459
25 : USD 7.722
120 : USD 7.722

   
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We are delighted to provide the iCE40HX1K-TQ144 from our FPGA - Field Programmable Gate Array category, at competitive rates not only in the United States, Australia, and India, but also across Europe and beyond. A long established and extensive electronic component distribution network has enhanced our global reach and dependability, ensuring cost savings through prompt deliveries worldwide. Client satisfaction is at the heart of our business, where every component counts and every customer matters. Our technical service team is ready to assist you. From product selection to after-sales support, we strive to deliver a seamless and satisfying experience. Are you ready to experience the best in electronic component distribution? Contact X-ON Electronics today and discover why X-On are a preferred choice for the iCE40HX1K-TQ144 and other electronic components in the FPGA - Field Programmable Gate Array category and beyond.

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iCE40 LP/HX/LM Family Handbook HB1011 Version 01.2, November 2013 iCE40 LP/HX/LM Family Handbook Table of Contents October 2013 Section I. iCE40 LP/HX Family Data Sheet Introduction Features ............................................................................................................................................................. 1-1 Introduction ........................................................................................................................................................ 1-2 Architecture Architecture Overview ........................................................................................................................................ 2-1 PLB Blocks................................................................................................................................................ 2-2 Routing...................................................................................................................................................... 2-3 Clock/Control Distribution Network ........................................................................................................... 2-3 sysCLOCK Phase Locked Loops (PLLs) .................................................................................................. 2-4 sysMEM Embedded Block RAM Memory ................................................................................................. 2-5 sysIO......................................................................................................................................................... 2-7 sysIO Buffer .............................................................................................................................................. 2-8 Non-Volatile Configuration Memory .......................................................................................................... 2-9 Power On Reset...................................................................................................................................... 2-10 Programming and Configuration ...................................................................................................................... 2-10 Power Saving Options............................................................................................................................. 2-10 DC and Switching Characteristics Absolute Maximum Ratings ............................................................................................................................... 3-1 Recommended Operating Conditions ................................................................................................................ 3-1 Power Supply Ramp Rates ................................................................................................................................ 3-2 Power-On-Reset Voltage Levels........................................................................................................................ 3-2 ESD Performance .............................................................................................................................................. 3-2 DC Electrical Characteristics.............................................................................................................................. 3-3 Static Supply Current LP Devices ................................................................................................................... 3-3 Static Supply Current HX Devices .................................................................................................................. 3-4 Programming NVCM Supply Current LP Devices........................................................................................... 3-4 Programming NVCM Supply Current HX Devices .......................................................................................... 3-5 Peak Startup Supply Current LP Devices ....................................................................................................... 3-5 Peak Startup Supply Current HX Devices....................................................................................................... 3-6 sysIO Recommended Operating Conditions...................................................................................................... 3-6 sysIO Single-Ended DC Electrical Characteristics............................................................................................. 3-6 sysIO Differential Electrical Characteristics ....................................................................................................... 3-7 LVDS25..................................................................................................................................................... 3-7 subLVDS................................................................................................................................................... 3-7 LVDS25E Emulation .......................................................................................................................................... 3-8 SubLVDS Emulation .......................................................................................................................................... 3-9 Typical Building Block Function Performance LP Devices............................................................................ 3-10 Pin-to-Pin Performance (LVCMOS25) .................................................................................................... 3-10 Register-to-Register Performance .......................................................................................................... 3-10 Typical Building Block Function Performance HX Devices ........................................................................... 3-10 Pin-to-Pin Performance (LVCMOS25) .................................................................................................... 3-10 Register-to-Register Performance .......................................................................................................... 3-10 Derating Logic Timing ...................................................................................................................................... 3-11 Maximum sysIO Buffer Performance ............................................................................................................... 3-11 iCE40 Family Timing Adders............................................................................................................................ 3-11 iCE40 External Switching Characteristics LP Devices.................................................................................. 3-13 iCE40 External Switching Characteristics HX Devices ................................................................................. 3-15 2013 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. www.latticesemi.com 1

Tariff Desc

8542.31.00 51 No ..Application Specific (Digital) Integrated Circuits (ASIC)

Electronic integrated circuits: Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
Monolithic integrated circuits:
LAT
LATTICE SEMI
Lattice Semiconductor
Lattice Semiconductor Corporation
Vantis
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