iCE40LP1K-QN84 Lattice

iCE40 LP/HX/LM Family Handbook HB1011 Version 01.2, November 2013 iCE40 LP/HX/LM Family Handbook Table of Contents October 2013 Section I. iCE40 LP/HX Family Data Sheet Introduction Features ............................................................................................................................................................. 1-1 Introduction ........................................................................................................................................................ 1-2 Architecture Architecture Overview ........................................................................................................................................ 2-1 PLB Blocks................................................................................................................................................ 2-2 Routing...................................................................................................................................................... 2-3 Clock/Control Distribution Network ........................................................................................................... 2-3 sysCLOCK Phase Locked Loops (PLLs) .................................................................................................. 2-4 sysMEM Embedded Block RAM Memory ................................................................................................. 2-5 sysIO......................................................................................................................................................... 2-7 sysIO Buffer .............................................................................................................................................. 2-8 Non-Volatile Configuration Memory .......................................................................................................... 2-9 Power On Reset...................................................................................................................................... 2-10 Programming and Configuration ...................................................................................................................... 2-10 Power Saving Options............................................................................................................................. 2-10 DC and Switching Characteristics Absolute Maximum Ratings ............................................................................................................................... 3-1 Recommended Operating Conditions ................................................................................................................ 3-1 Power Supply Ramp Rates ................................................................................................................................ 3-2 Power-On-Reset Voltage Levels........................................................................................................................ 3-2 ESD Performance .............................................................................................................................................. 3-2 DC Electrical Characteristics.............................................................................................................................. 3-3 Static Supply Current LP Devices ................................................................................................................... 3-3 Static Supply Current HX Devices .................................................................................................................. 3-4 Programming NVCM Supply Current LP Devices........................................................................................... 3-4 Programming NVCM Supply Current HX Devices .......................................................................................... 3-5 Peak Startup Supply Current LP Devices ....................................................................................................... 3-5 Peak Startup Supply Current HX Devices....................................................................................................... 3-6 sysIO Recommended Operating Conditions...................................................................................................... 3-6 sysIO Single-Ended DC Electrical Characteristics............................................................................................. 3-6 sysIO Differential Electrical Characteristics ....................................................................................................... 3-7 LVDS25..................................................................................................................................................... 3-7 subLVDS................................................................................................................................................... 3-7 LVDS25E Emulation .......................................................................................................................................... 3-8 SubLVDS Emulation .......................................................................................................................................... 3-9 Typical Building Block Function Performance LP Devices............................................................................ 3-10 Pin-to-Pin Performance (LVCMOS25) .................................................................................................... 3-10 Register-to-Register Performance .......................................................................................................... 3-10 Typical Building Block Function Performance HX Devices ........................................................................... 3-10 Pin-to-Pin Performance (LVCMOS25) .................................................................................................... 3-10 Register-to-Register Performance .......................................................................................................... 3-10 Derating Logic Timing ...................................................................................................................................... 3-11 Maximum sysIO Buffer Performance ............................................................................................................... 3-11 iCE40 Family Timing Adders............................................................................................................................ 3-11 iCE40 External Switching Characteristics LP Devices.................................................................................. 3-13 iCE40 External Switching Characteristics HX Devices ................................................................................. 3-15 2013 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. www.latticesemi.com 1