iCE40 LP/HX Family Data Sheet DS1040 Version 3.1, March 2015iCE40 LP/HX Family Data Sheet Introduction February 2014 Data Sheet DS1040 Features Schmitt trigger inputs, to 200 mV typical Flexible Logic Architecture Five devices with 384 to 7,680 LUT4s and hysteresis 10 to 206 I/Os Programmable pull-up mode Ultra Low Power Devices Flexible On-Chip Clocking Advanced 40 nm low power process Eight low-skew global clock resources As low as 21 A standby power Up to two analog PLLs per device Programmable low swing differential I/Os Flexible Device Configuration SRAM is configured through: Embedded and Distributed Memory Up to 128 kbits sysMEM Embedded Block Standard SPI Interface RAM Internal Nonvolatile Configuration Memory (NVCM) Pre-Engineered Source Synchronous I/O DDR registers in I/O cells Broad Range of Package Options WLCSP, QFN, VQFP, TQFP, ucBGA, caBGA, High Current LED Drivers Three High Current Drivers used for three differ- and csBGA package options ent LEDs or one RGB LED Small footprint package options As small as 1.40 mm x 1.48 mm High Performance, Flexible I/O Buffer Programmable sysIO buffer supports wide Advanced halogen-free packaging range of interfaces: LVCMOS 3.3/2.5/1.8 LVDS25E, subLVDS Table 1-1. iCE40 Family Selection Guide Part Number LP384 LP640 LP1K LP4K LP8K HX1K HX4K HX8K Logic Cells (LUT + Flip-Flop) 384 640 1,280 3,520 7,680 1,280 3,520 7,680 RAM4K Memory Blocks 0 8 16 20 32 16 20 32 RAM4K RAM bits 0 32K 64K 80K 128K 64K 80K 128K 1 2 2 1 Phase-Locked Loops (PLLs) 0 0 1 2 2 1 22 Maximum Programmable I/O Pins 63 25 95 167 178 95 95 206 Maximum Differential Input Pairs 8 3 122023111226 High Current LED Drivers 03300000 Package Code Programmable I/O: Max Inputs (LVDS25) 16 WLCSP (1.40 mm x 1.48 mm, 0.35 SWG16 10(0) 10(0) mm) 32 QFN SG32 21(3) (5 mm x 5 mm, 0.5 mm) 36 ucBGA 1 CM36 25(3) 25(3) (2.5 mm x 2.5 mm, 0.4 mm) 49 ucBGA 1 CM49 37(6) 35(5) (3 mm x 3 mm, 0.4 mm) 81 ucBGA 2 2 CM81 63(8) 63(9) 63(9) (4 mm x 4 mm, 0.4 mm) 81 csBGA 1 CB81 62(9) (5 mm x 5 mm, 0.5 mm) 2014 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. www.latticesemi.com 1-1 DS1040 Introduction 01.5