INTV-DINT-P2-U3 Lattice

Interleaver/De-interleaver IP Core Users Guide December 2010 IPUG61 02.7Table of Contents Chapter 1. Introduction .......................................................................................................................... 4 Quick Facts ........................................................................................................................................................... 4 Features ................................................................................................................................................................ 8 Chapter 2. Functional Description ...................................................................................................... 10 Block Diagrams ................................................................................................................................................... 10 Convolutional Interleaver/de-interleaver .................................................................................................... 11 Rectangular Interleaver/De-interleaver ...................................................................................................... 12 Latency....................................................................................................................................................... 13 Signal Descriptions ............................................................................................................................................. 13 Timing Diagrams ................................................................................................................................................. 16 Chapter 3. Parameter Settings ............................................................................................................ 17 Type and Mode Tab............................................................................................................................................ 18 Type ........................................................................................................................................................... 18 Mode .......................................................................................................................................................... 18 Convolutional Parameters Tab............................................................................................................................ 19 Interleaver/Deinterleaver............................................................................................................................ 19 Rectangular Parameters Tab.............................................................................................................................. 20 Interleaver/Deinterleaver............................................................................................................................ 20 Block Size Type ......................................................................................................................................... 20 Permutations.............................................................................................................................................. 21 Convolutional Optional Pins Tab......................................................................................................................... 21 Rectangular Optional Pins Tab ........................................................................................................................... 22 Chapter 4. IP Core Generation............................................................................................................. 24 Licensing the IP Core.......................................................................................................................................... 24 Getting Started.................................................................................................................................................... 24 IPexpress-Created Files and Top Level Directory Structure............................................................................... 26 Permutation Pattern Input File Format ................................................................................................................ 28 Instantiating the Core.......................................................................................................................................... 28 Running Functional Simulation ........................................................................................................................... 28 Synthesizing and Implementing the Core in a Top-Level Design ....................................................................... 29 Hardware Evaluation........................................................................................................................................... 30 Enabling Hardware Evaluation in Diamond................................................................................................ 30 Enabling Hardware Evaluation in ispLEVER.............................................................................................. 30 Updating/Regenerating the IP Core .................................................................................................................... 30 Regenerating an IP Core in Diamond ........................................................................................................ 30 Regenerating an IP Core in ispLEVER ...................................................................................................... 31 Chapter 5. Support Resources ............................................................................................................ 32 Lattice Technical Support.................................................................................................................................... 32 Online Forums............................................................................................................................................ 32 Telephone Support Hotline ........................................................................................................................ 32 E-mail Support ........................................................................................................................................... 32 Local Support............................................................................................................................................. 32 Internet....................................................................................................................................................... 32 References.......................................................................................................................................................... 32 LatticeEC/ECP ........................................................................................................................................... 32 LatticeECP2/M ........................................................................................................................................... 32 LatticeECP3 ............................................................................................................................................... 32 LatticeSC/M................................................................................................................................................ 32 LatticeXP.................................................................................................................................................... 33 2010 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. IPUG61 02.7 December 2010 2 Interleaver/De-interleaver IP Core Users Guide