RSDEC-DBLK-E3-UT3 Lattice

Dynamic Block Reed-Solomon Decoder Users Guide December 2010 IPUG52 01.6Table of Contents Chapter 1. Introduction .......................................................................................................................... 4 Quick Facts ........................................................................................................................................................... 4 Features ................................................................................................................................................................ 8 Chapter 2. Functional Description ...................................................................................................... 10 Block Diagram..................................................................................................................................................... 10 General Description ............................................................................................................................................ 10 Field Polynomial......................................................................................................................................... 11 Generator Polynomial ................................................................................................................................ 11 Shortened Codes ....................................................................................................................................... 11 Systematic Decoder................................................................................................................................... 11 Decoding Modes ........................................................................................................................................ 11 Functional Description......................................................................................................................................... 12 Syndrome Transform ................................................................................................................................. 13 Key Equation Solver................................................................................................................................... 13 Error Locator .............................................................................................................................................. 13 Error Magnitude Corrector ......................................................................................................................... 13 Control Unit ................................................................................................................................................ 13 Basis Conversion Modules......................................................................................................................... 13 Variable Block Size .................................................................................................................................... 13 Variable Check Symbols............................................................................................................................ 14 Puncturing Pattern File Format ........................................................................................................................... 14 Default Field Polynomials........................................................................................................................... 14 Signal Descriptions ............................................................................................................................................. 15 Timing Specifications .......................................................................................................................................... 17 Chapter 3. Parameter Settings ............................................................................................................ 20 RS Decoder Configuration GUI........................................................................................................................... 21 Core Configuration..................................................................................................................................... 21 RS Parameters........................................................................................................................................... 21 Check Symbols .......................................................................................................................................... 22 Block Size Type ......................................................................................................................................... 22 Puncturing.................................................................................................................................................. 22 Decoding Mode.......................................................................................................................................... 22 Memory Type ............................................................................................................................................. 22 Optional Ports ............................................................................................................................................ 23 Chapter 4. IP Core Generation............................................................................................................. 24 Licensing the IP Core.......................................................................................................................................... 24 Getting Started.................................................................................................................................................... 24 IPexpress-Created Files and Top Level Directory Structure............................................................................... 26 Instantiating the Core.......................................................................................................................................... 28 Running Functional Simulation ........................................................................................................................... 28 Synthesizing and Implementing the Core in a Top-Level Design ....................................................................... 28 Hardware Evaluation........................................................................................................................................... 29 Enabling Hardware Evaluation in Diamond................................................................................................ 29 Enabling Hardware Evaluation in ispLEVER.............................................................................................. 29 Updating/Regenerating the IP Core .................................................................................................................... 29 Regenerating an IP Core in Diamond ........................................................................................................ 29 Regenerating an IP Core in ispLEVER ...................................................................................................... 30 Chapter 5. Support Resources ............................................................................................................ 31 Lattice Technical Support.................................................................................................................................... 31 2010 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. IPUG52 01.6, December 2010 2 Dynamic Block Reed-Solomon Decoder Users Guide