LY62256
Rev. 2.9 32K X 8 BIT LOW POWER CMOS SRAM
REVISION HISTORY
Revision Description Issue Date
Rev. 1.0. Initial Issue Jul.25.2004
Rev. 2.0. Revised Vcc Range(Vcc=4.5~5.5V => 2.7~5.5V) May.4.2005
Rev. 2.1. Revised ISB1 May.13.2005
Rev. 2.2 Adding PKG type : skinny P-DIP Aug.29.2005
Rev. 2.3 Revised VIH(min)=2.4V, VIL(max)=0.6V Feb.24.2006
Rev. 2.4 Revised VIH(min)=2.4V, VIL(max)=0.6V (VCC=2.7~3.6V) Jul.31.2006
VIH(min)=2.4V, VIL(max)=0.8V (VCC=4.5~5.5V)
Rev. 2.5 Revised STSOP Package Outline Dimension Mar.26.2008
Rev. 2.6 Added SL grade Mar.30.2009
Added I /I values when T = 25 and T = 40
SB1 DR A A
FEATURES ORDERING INFORMATION
Revised & Lead
free and green package available to Green package available
Added packing type in ORDERING INFORMATION
Revised I
SB1(MAX)
Revised V to V and V
TERM T1 T2
Revised Test Condition of I /I
SB1 DR
Deleted T in ABSOLUTE MAXIMUN RATINGS
SOLDER
Rev. 2.7 Dec.18.2009
Revised PACKAGE OUTLINE DIMENSION in page 8 & 9
Rev. 2.8 May.7.2010
Revised PACKAGE OUTLINE DIMENSION in page 10
Rev. 2.9 Aug.25.2010
ORDERING INFORMATION
Revised in page 12
Revised PACKAGE OUTLINE DIMENSION in page 9
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
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LY62256
Rev. 2.9 32K X 8 BIT LOW POWER CMOS SRAM
FEATURES GENERAL DESCRIPTION
The LY62256 is a 262,144-bit low power CMOS
Fast access time : 35/55/70ns
static random access memory organized as 32,768
Low power consumption:
words by 8 bits. It is fabricated using very high
Operating current : 20/15/10mA (TYP.)
performance, high reliability CMOS technology. Its
Standby current : 1 A (TYP.)
standby current is stable within the range of
Single 2.7~5.5V power supply
operating temperature.
All inputs and outputs TTL compatible
Fully static operation
The LY62256 is well designed for low power
Tri-state output
application, and particularly well suited for battery
Data retention voltage : 1.5V (MIN.)
back-up nonvolatile memory application.
Green package available
Package : 28-pin 600 mil PDIP
The LY62256 operates from a single power
28-pin 330 mil SOP
supply of 2.7~5.5V and all inputs and outputs are
28-pin 8mm x 13.4mm STSOP
fully TTL compatible
28-pin 300 mil Skinny P-DIP
PRODUCT FAMILY
Product Operating Power Dissipation
Vcc Range Speed
Family Temperature Standby(ISB1,TYP.) Operating(Icc,TYP.)
0 ~ 70
LY62256 2.7 ~ 5.5V 35/55/70ns 1A 20/15/10mA
-20 ~ 80
LY62256(E) 2.7 ~ 5.5V 35/55/70ns 1A 20/15/10mA
LY62256(I) -40 ~ 85 2.7 ~ 5.5V 35/55/70ns 1A 20/15/10mA
FUNCTIONAL BLOCK DIAGRAM PIN DESCRIPTION
SYMBOL DESCRIPTION
A0 - A14 Address Inputs
Vcc
Vss
DQ0 DQ7 Data Inputs/Outputs
CE# Chip Enable Input
32Kx8
A0-A14 DECODER
MEMORY ARRAY
WE# Write Enable Input
OE# Output Enable Input
V Power Supply
CC
V Ground
SS
I/O DATA
DQ0-DQ7 COLUMN I/O
CIRCUIT
CE#
CONTROL
WE#
CIRCUIT
OE#
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
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