LY62L102516 Rev. 1.0 1024K X 16 BIT LOW POWER CMOS SRAM REVISION HISTORY Revision Description Issue Date Rev. 0.1 Initial Issue Feb.20.2008 Rev. 0.2 Added SL Spec. Jul.2.2008 Rev. 0.3 Added I /I values when T = 25 and T = 40 Mar.30.2009 SB1 DR A A FEATURES ORDERING INFORMATION Revised & Lead free and green package available to Green package available Added packing type in ORDERING INFORMATION Deleted TSOLDER in ABSOLUTE MAXIMUN RATINGS Rev. 0.4 May.7.2010 Revised PACKAGE OUTLINE DIMENSION in page 10 Rev. 1.0 Aug.29.2013 Revised Notes item 1 and 2 in page 3 1. V (max) = V + 2.0V for pulse width less than 6ns. IH CC 2. VIL(min) = VSS - 2.0V for pulse width less than 6ns. Revised ORDERING INFORMATION Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 0 LY62L102516 Rev. 1.0 1024K X 16 BIT LOW POWER CMOS SRAM FEATURES GENERAL DESCRIPTION The LY62L102516 is a 16,777,216-bit low power Fast access time : 55/70ns CMOS static random access memory organized as Low power consumption: 1,048,576 words by 16 bits. It is fabricated using Operating current : 45/30mA (TYP.) very high performance, high reliability CMOS Standby current : 10 A (TYP.) LL-version technology. Its standby current is stable within the 4 A (TYP.) SL-version range of operating temperature. Single 2.7V ~ 3.6V power supply All inputs and outputs TTL compatible The LY62L102516 is well designed for low power Fully static operation application, and particularly well suited for battery Tri-state output back-up nonvolatile memory application. Data byte control : LB (DQ0 ~ DQ7) UB (DQ8 ~ DQ15) The LY62L102516 operates from a single power Data retention voltage : 1.2V (MIN.) supply of 2.7V ~ 3.6V and all inputs and outputs are Green package available fully TTL compatible Package : 48-pin 12mm x 20mm TSOP-I 48-ball 6mm x 8mm TFBGA PRODUCT FAMILY Power Dissipation Product Operating Vcc Range Speed Family Temperature Standby(ISB1,TYP.) Operating(Icc,TYP.) LY62L102516 0 ~ 70 2.7 ~ 3.6V 55/70ns 10A(LL)/4A(SL) 45/30mA LY62L102516(E -20 ~ 80 2.7 ~ 3.6V 55/70ns 10A(LL)/4A(SL) 45/30mA ) LY62L102516(I) -40 ~ 85 2.7 ~ 3.6V 55/70ns 10A(LL)/4A(SL) 45/30mA FUNCTIONAL BLOCK DIAGRAM PIN DESCRIPTION SYMBOL DESCRIPTION A0 - A19 Address Inputs Vcc Vss DQ0 DQ15 Data Inputs/Outputs CE , CE2 Chip Enable Input 1024Kx16 A0-A19 DECODER MEMORY ARRAY WE Write Enable Input OE Output Enable Input LB Lower Byte Control UB Upper Byte Control V Power Supply CC V Ground DQ0-DQ7 SS Lower Byte I/O DATA COLUMN I/O CIRCUIT DQ8-DQ15 Upper Byte CE CE2 WE CONTROL OE CIRCUIT LB UB Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 1