LY62W1024 Rev. 1.8 128K X 8 BIT LOW POWER CMOS SRAM REVISION HISTORY Revision Description Issue Date Rev. 1.0 Initial Issue Aug.28.2005 Rev. 1.1 Revised ISB1 LL/LLI-LLE(max)= 50/100 A => 20/50 A Mar.30.2006 I LL/LLI-LLE(max)= 20/40 A => 12/30 A DR Rev. 1.2 Added SL Spec. Nov.2.2007 Rev. 1.3 May.6.2008 Revised typos in FEATURES Rev. 1.4 Revised I /I Mar.30.2009 SB1 DR(MAX.) Added I /I values when T = 25 and T = 40 SB1 DR A A Revised FEATURES & ORDERING INFORMATION Lead free and green package available to Green package available Added packing type in ORDERING INFORMATION Revised VTERM to VT1 and VT2 ABSOLUTE MAXIMUN RATINGS Deleted TSOLDER in Rev. 1.5 May.7.2010 Revised PACKAGE OUTLINE DIMENSION in page 10/11/12/13 Rev. 1.6 Aug.30.2010 Revised ORDERING INFORMATION in page 14 Rev. 1.7 Deleted E Grade Aug.9.2011 Rev. 1.8 Revised PIN CONFIGURATION in page 2 Apr.06.2012 Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 0 LY62W1024 Rev. 1.8 128K X 8 BIT LOW POWER CMOS SRAM FEATURES GENERAL DESCRIPTION The LY62W1024 is a 1,048,576-bit low power Fast access time : 35/55/70ns CMOS static random access memory organized as Low power consumption: 131,072 words by 8 bits. It is fabricated using very Operating current : 12/10/7mA (TYP.) high performance, high reliability CMOS technology. Standby current : 1 A (TYP.) LL-version Its standby current is stable within the range of 0.8 A (TYP.) SL-version operating temperature. Single 2.7V ~ 5.5V power supply All outputs TTL compatible The LY62W1024 is well designed for very low power Fully static operation system applications, and particularly well suited for Tri-state output battery back-up nonvolatile memory application. Data retention voltage : 1.5V (MIN.) Green package available The LY62W1024 operates from a single power Package : 32-pin 450 mil SOP supply of 2.7V ~ 5.5V and all inputs and outputs are 32-pin 600 mil P-DIP fully TTL compatible 32-pin 8mm x 20mm TSOP-I 32-pin 8mm x 13.4mm STSOP 36-ball 6mm x 8mm TFBGA PRODUCT FAMILY Power Dissipation Product Operating Vcc Range Speed Family Temperature Standby(ISB1,TYP.) Operating(Icc,TYP.) 0 ~ 70 LY62W1024 2.7 ~ 5.5V 35/55/70ns 1A(LL)/0.8A(SL) 12/10/7mA LY62W1024(I) -40 ~ 85 2.7 ~ 5.5V 35/55/70ns 1A(LL)/0.8A(SL) 12/10/7mA FUNCTIONAL BLOCK DIAGRAM PIN DESCRIPTION SYMBOL DESCRIPTION A0 - A16 Address Inputs Vcc Vss DQ0 DQ7 Data Inputs/Outputs CE , CE2 Chip Enable Inputs 128Kx8 A0-A16 DECODER MEMORY ARRAY WE Write Enable Input OE Output Enable Input V Power Supply CC V Ground SS NC No Connection I/O DATA DQ0-DQ7 COLUMN I/O CIRCUIT CE CE2 CONTROL WE CIRCUIT OE Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 1