XR16C2550 2.97V TO 5.5V DUART WITH 16-BYTE FIFO FEBRUARY 2007 REV. 1.0.2 FEATURES GENERAL DESCRIPTION 2.97 Volt to 5.5 Volt Operation The XR16C2550 (2550) is a dual universal asynchronous receiver and transmitter (UART). The 5 Volt Tolerant Inputs XR16C2550 is an improved version of the PC16550 Pin-to-pin compatible to Exars ST16C2450, UART with higher operating speed and faster access XR16L2550 and XR16L2750 times. The 2550 provides enhanced UART functions Pin-to-pin compatible to TIs TL16C752B on the 48- with 16 byte FIFOs, a modem control interface, and TQFP package data rates up to 4 Mbps. Onboard status registers provide the user with error indications and Pin alike XR16C2850 48-TQFP package but operational status. System interrupts and modem without CLK8/16, CLKSEL and HDCNTL inputs control features may be tailored by external software 2 independent UART channels to meet specific user requirements. Independent Up to 4 Mbps with external clock of 64 MHz programmable baud rate generators are provided to Up to 1.5 Mbps data rate with a 24 MHz crystal select transmit and receive clock rates from 50 bps to frequency 4 Mbps. The Baud Rate Generator can be configured for either crystal or external clock input. An internal 16 byte Transmit FIFO to reduce the bandwidth loopback capability allows onboard diagnostics. The requirement of the external CPU 2550 is available in a 44-pin PLCC and 48-pin TQFP 16 byte Receive FIFO with error tags to reduce packages. The 2550 is fabricated in an advanced the bandwidth requirement of the external CPU CMOS process capable of operating from 2.97 volt to 4 selectable Receive FIFO interrupt trigger 5.5 volt power supply. levels APPLICATIONS Modem control signals (CTS , RTS , DSR , DTR , RI , CD ) Portable Appliances Programmable character lengths (5, 6, 7, 8) Telecommunication Network Routers with even, odd, or no parity Ethernet Network Routers Crystal oscillator or external clock input Cellular Data Devices 48-TQFP and 44-PLCC packages Factory Automation and Process Controls FIGURE 1. XR16C2550 BLOCK DIAGRAM 2.97 V to 5.5V *All inputs are 5V tolerant A2:A0 GND D7:D0 IOR UART Channel A IOW TXA , RXA, DTRA , 16 Byte TX FIFO CSA UART DSRA , RTSA , Regs DTSA , CDA , RIA , CSB TX & RX OP2A 8- bit Data INTA BRG Bus 16 Byte RX FIFO INTB Interface TXRDYA TXB, RXB, DTRB , TXRDYB UART Channel B DSRB , RTSB , RXRDYA ( same as Channel A ) CTSB , CDB , RIB , RDRXYB OP2B Reset XTAL1 Crystal Osc / Buffer XTAL2 Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com XR16C2550 2.97V TO 5.5V DUART WITH 16-BYTE FIFO REV. 1.0.2 FIGURE 2. PIN OUT ASSIGNMENT 1 36 RESET D5 D6 2 35 DTRB D7 3 34 DTRA RTSA RXB 4 33 RXA 5 32 OP2A XR16C2550 TXRDYB 6 31 RXRDYA 48-pin TQFP INTA TXA 7 30 TXB 8 29 INTB OP2B 9 28 A0 A1 CSA 10 27 CSB 11 26 A2 NC 12 25 NC D5 7 39 RESET D6 8 38 DTRB D7 9 37 DTRA RXB 10 36 RTSA RXA 11 35 OP2A XR16C2550 TXRDYB 12 34 RXRDYA 44-pin PLCC INTA TXA 13 33 32 INTB TXB 14 OP2B 15 31 A0 CSA 16 30 A1 CSB 17 29 A2 ORDERING INFORMATION OPERATING PART NUMBER PACKAGE DEVICE STATUS TEMPERATURE RANGE XR16C2550IJ 44-Lead PLCC -40C to +85C Active XR16C2550IM 48-Lead TQFP -40C to +85C Active 2 XTAL1 13 48 D4 XTAL2 14 47 D3 IOW 46 D2 15 CDB 16 45 D1 GND 17 44 D0 RXRDYB 43 18 TXRDYA IOR 42 VCC 19 DSRB 20 41 RIA RIB 21 40 CDA RTSB 22 39 DSRA CTSB 38 23 CTSA NC 24 37 NC XTAL1 18 6 D4 19 XTAL2 5 D3 IOW 20 4 D2 CDB 21 3 D1 GND 22 2 D0 RXRDYB 23 1 TXRDYA IOR 24 44 VCC DSRB 25 43 RIA RIB 26 42 CDA RTSB 27 41 DSRA CTSB 28 40 CTSA