xr XR16C2852 2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS FEBRUARY 2005 REV. 2.1.1 FEATURES GENERAL DESCRIPTION Added feature in devices with a top mark date code of 1 The XR16C2852 (2852) is a dual universal F2 YYW and newer: asynchronous receiver and transmitter (UART). The 5V tolerant inputs device operates at 2.97V to 5.5V and is pin-to-pin 0 ns address hold time (T ) compatible to Exars ST16C2552 and XR16L2752. AH The 2852 register set is compatible to the Pin-to-pin compatible to Exars ST16C2552 and ST16C2552 and the XR16L2752 enhanced features. XR16L2752 It supports the Exars enhanced features of 128 bytes Improved version of PC16C552 of TX and RX FIFOs, programmable FIFO trigger level and FIFO level counters, automatic hardware Two independent UART channels (RTS/CTS) and software flow control, automatic RS- Register set compatible to 16C550 485 half duplex direction control output and a Up to 3 Mbps at 5V, and 2 Mbps at 3.3V complete modem interface. Onboard registers Transmit and Receive FIFOs of 128 bytes provide the user with operational status and data Programmable TX and RX FIFO Trigger Levels error flags. An internal loopback capability allows Transmit and Receive FIFO Level Counters system diagnotics. Independent programmable baud rate generators are provided in each channel to Automatic Hardware (RTS/CTS) Flow Control select data rates up to 3.125 Mbps at 5V. The 2852 is Selectable Auto RTS Flow Control Hysteresis available in the 44-pin PLCC package. Automatic Software (Xon/Xoff) Flow Control NOTE: 1 Covered by U.S. Patent 5,649,122 and 5,949,787 Automatic RS-485 Half-duplex Direction Control Output APPLICATIONS Wireless Infrared (IrDA 1.0) Encoder/Decoder Portable Appliances Automatic sleep mode Telecommunication Network Routers Alternate Function Register Ethernet Network Routers Device Identification and Revision Cellular Data Devices Crystal oscillator or external clock input Factory Automation and Process Controls 2.97 to 5.5 volt operation Industrial and commercial temperature ranges FIGURE 1. XR16C2852 BLOCK DIAGRAM 2.97V to 5.5V VCC A2:A0 GND D7:D0 IOR UART Channel A IOW TXA (or TXIRA) 128 Byte TX FIFO CS UART CHSEL Regs IR TX & RX ENDEC INTA BRG 128 Byte RX FIFO INTB RXA (or RXIRA) 8-bit Data TXRDYA Bus TXRDYB TXB (or TXIRB) UART Channel B Interface (same as Channel A) MFA RXB (or RXIRB) (OP2A , BAUDOUTA , or RXRDYA ) XTAL1 Crystal Osc/Buffer MFB XTAL2 (OP2B , CTS A/B, RI A/B, BAUDOUTB , or Modem Control Logic CD A/B, DSR A/B RXRDYB ) Reset DTR A/B, RTS A/B Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com XR16C2852 xr 2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS REV. 2.1.1 FIGURE 2. PIN OUT ASSIGNMENT D5 7 39 RXA 38 TXA D6 8 D7 9 37 DTRA A0 10 36 RTSA 11 35 MFA XTAL1 XR16C2852 GND 12 34 INTA 44-pin PLCC VCC XTAL2 13 33 A1 14 32 TXRDYB A2 15 31 RIB 16 30 CDB CHSEL INTB 17 29 DSRB ORDERING INFORMATION PART NUMBER PACKAGE OPERATING TEMPERATURE RANGE DEVICE STATUS XR16C2852CJ 44-PLCC 0C to +70C Active XR16C2852IJ 44-PLCC -40C to +85C Active 2 CS 18 6 D4 MFB 19 5 D3 IOW 20 4 D2 RESET 21 3 D1 22 GND 2 D0 RTSB 23 1 TXRDYA 24 IOR 44 VCC RXB 25 43 RIA 26 TXB 42 CDA DTRB 27 41 DSRA 28 40 CTSB CTSA