XRT71D00IQ-F MaxLinear

XRT71D00 E3/DS3/STS-1 JITTER ATTENUATOR SEPTEMBER 2001 REV. 1.2.0 Meets jitter transfer characteristic requirement as GENERAL DESCRIPTION specified by ETSI TBR24 (for E3 applications). The XRT71D00 is a single channel, single chip Jitter Meets the Output Jitter and Wander specifications Attenuator, that meets the Jitter transfer characteristic described in ANSI T1.105.03b, Bellcore GR-253- requirements specified in the ETSI TBR-24, Bellcore CORE and Bellcore GR-499-CORE standards. GR-499-CORE and GR-253-CORE standards. Selectable buffer size of 16 and 32 bits In addition, the XRT71D00 also meets the Output Jit- ter and Wander specifications described in the ANSI Jitter attenuator can be disabled T1.105.03b 1997, Bellcore GR-253-CORE and GR- Available in a 32 pin TQFP package. 499-CORE standards. Single 3.3V or 5.0V supply. FEATURES 0 0 Operates over - 40 C to 85 C temperature range. Meets E3/DS3/STS-1 jitter transfer requirements APPLICATIONS No external components required E3/DS3 Access Equipment. Compliant with the jitter transfer characteristic DSLAMs requirements specified in ITU G.751, G.752, and G.755 for E3 applications FIGURE 1. BLOCK DIAGRAM OF THE XRT71D00 MClk BWS Timing Control Block / Phase locked Loop ICT DJA RRClk RClk Write Clock Read Clock RRPOS ClkES 16/32 Bit FIFO RPOS RRNEG RNEG FL HOST/HW Microprocessor Serial Interface Reset E3/DS3 CS SDI SDO SClk Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com XRT71D00 E3/DS3/STS-1 JITTER ATTENUATOR REV. 1.2.0 FIGURE 2. PIN OUT OF THE XRT71D00 (32 LEAD TFQP PACKAGE) 32 25 24 NC NC 1 RNEG RRNEG RClk RRClk GND GND MClk ICT GND Reset VDD DJA/SDO 8 17 STS-1 NC 9 16 ORDERING INFORMATION PART NUMBER PACKAGE OPERATING TEMPERATURE RANGE 0 0 XRT71D00IQ 32 Lead TQFP -40 C to +85 C 2 NC NC ClkES/SDI RPOS FSS/Clk VDD HOST/HW E3 / DS3 / CS NC Ch Addr 0 FL VDD BWS/Ch Addr 1 RRPOS NC NC