Features 8-bit Microcontroller Compatible with 8051 Products Enhanced 8051 Architecture Single Clock Cycle per Byte Fetch 12 Clock per Machine Cycle Compatibility Mode Up to 20 MIPS Throughput at 20 MHz Clock Frequency Fully Static Operation: 0 Hz to 20 MHz On-chip 2-cycle Hardware Multiplier 16x16 MultiplyAccumulate Unit 256 x 8 Internal RAM 8-bit Flash On-chip 2KB Expanded RAM (ERAM) Software Selectable Size (0, 256, 512, 768, 1024, 1792, 2048 Bytes) Microcontroller Dual Data Pointers 4-level Interrupt Priority with 64KB Nonvolatile Program and Data Memory 64KB of In-System Programmable (ISP) Flash Program Memory Program 4KB of EEPROM (AT89LP51ED2/ID2 Only) 512-byte User Signature Array Memory Endurance: 10,000 Write/Erase Cycles Serial Interface for Program Downloading 2KB Boot ROM Contains Low Level Flash Programming Routines and a Default AT89LP51RD2 Serial Bootloader Peripheral Features AT89LP51ED2 Three 16-bit Enhanced Timer/Counters Seven 8-bit PWM Outputs AT89LP51ID2 16-bit Programmable Counter Array High Speed Output, Compare/Capture Pulse Width Modulation, Watchdog Timer Capabilities Enhanced UART with Automatic Address Recognition and Framing Preliminary Error Detection Enhanced Master/Slave SPI with Double-buffered Send/Receive Summary Two Wire Interface 400K bit/s Programmable Watchdog Timer with Software Reset 8 General-purpose Interrupt and Keyboard Interface Pins Special Microcontroller Features Dual Oscillator Support: Crystal, 32 kHz Crystal, 8 MHz Internal (AT89LP51ID2) Two-wire On-Chip Debug Interface Brown-out Detection and Power-on Reset with Power-off Flag Selectable Polarity External Reset Pin Low Power Idle and Power-down Modes Interrupt Recovery from Power-down Mode 8-bit Clock Prescaler I/O and Packages Up to 40 Programmable I/O Lines Green (Pb/Halide-free) PLCC44, VQFP44, QFN44, PDIP40 Configurable I/O Modes Quasi-bidirectional (80C51 Style), Input-only (Tristate) Push-pull CMOS Output, Open-drain Operating Conditions 2.4V to 5.5V V Voltage Range CC -40 C to 85C Temperature Range 0 to 20 MHz 2.4V5.5V (Single-cycle) 3714ASMICRO7/111. Pin Configurations 1.1 44-lead VQFP 1.3 44-pad VQFN/QFN/MLF SPI in remap mode AT89LP51ID2 Only 33 (MOSI/CEX2/MISO) P1.5 1 P0.4 (AD4) (MOSI/CEX2/MISO) P1.5 1 33 P0.4 (AD4) (MISO/CEX3/SCK) P1.6 2 32 P0.5 (AD5) (MISO/CEX3/SCK) P1.6 2 32 P0.5 (AD5) (SCK/CEX4/MOSI) P1.7 3 31 P0.6 (AD6) (SCK/CEX4/MOSI) P1.7 3 31 P0.6 (AD6) (DCL) RST 4 30 P0.7 (AD7) (DCL) RST 4 30 P0.7 (AD7) (RXD) P3.0 5 29 POL (RXD) P3.0 5 29 POL (SDA) P4.1 6 28 P4.0 (SCL) (SDA) P4.1 28 P4.0 (SCL) 6 (TXD) P3.1 7 27 P4.4 (ALE) (TXD) P3.1 7 27 P4.4 (ALE) (INT0) P3.2 8 26 P4.5 (PSEN) (INT0) P3.2 8 26 P4.5 (PSEN) (INT1) P3.3 9 25 P2.7 (A15/AIN3) (INT1) P3.3 9 25 P2.7 (A15/AIN3) (T0) P3.4 10 24 P2.6 (A14/AIN2) (T0) P3.4 10 24 P2.6 (A14/AIN2) (T1) P3.5 11 23 P2.5 (A13/AIN1) (T1) P3.5 11 23 P2.5 (A13/AIN1) NOTE: SPI in remap mode Bottom pad should be AT89LP51ID2 Only soldered to ground 1.2 44-lead PLCC 1.4 40-pin PDIP (T2) P1.0 1 40 VDD (SS/T2EX) P1.1 2 39 P0.0 (AD0) (ECI) P1.2 3 38 P0.1 (AD1) (CEX0) P1.3 4 37 P0.2 (AD2) (SS/CEX1) P1.4 5 36 P0.3 (AD3) (MOSI/CEX2/MISO) P1.5 6 35 P0.4 (AD4) (MOSI/CEX2/MISO) P1.5 7 39 P0.4 (AD4) (MISO/CEX3/SCL) P1.6 7 34 P0.5 (AD5) (MISO/CEX3/SCK) P1.6 8 38 P0.5 (AD5) (SCK/CEX4/MOSI) P1.7 8 33 P0.6 (AD6) (SCK/CEX4/MOSI) P1.7 9 37 P0.6 (AD6) RST 9 32 P0.7 (AD7) (DCL) RST 10 36 P0.7 (AD7) (RXD) P3.0 10 31 POL (RXD) P3.0 11 35 POL (TXD) P3.1 11 30 P4.4 (ALE) (SDA) P4.1 12 34 P4.0 (SCL) (INT0) P3.2 12 29 P4.5 (PSEN) (TXD) P3.1 13 33 P4.4 (ALE) (INT1) P3.3 13 28 P2.7 (A15/AIN3) (INT0) P3.2 14 32 P4.5 (PSEN) (INT1) P3.3 15 31 P2.7 (A15/AIN3) (T0) P3.4 14 27 P2.6 (A14/AIN2) (T0) P3.4 16 30 P2.6 (A14/AIN2) (T1) P3.5 15 26 P2.5 (A13/AIN1) (T1) P3.5 17 29 P2.5 (A13/AIN1) (WR) P3.6 16 25 P2.4 (A12/AIN0) (RD) P3.7 17 24 P2.3 (A11/DAC+) SPI in remap mode AT89LP51ID2 Only (XTAL2A) P4.7 18 23 P2.2 (A10/DAC-) (XTAL1A) P4.6 19 22 P2.1 (A9) GND 20 21 P2.0 (A8) SPI in remap mode 2 AT89LP51RD2/ED2/ID2 Summary - Preliminary 3714ASMICRO7/11 (WR) P3.6 18 6 P1.4 (CEX1/SS) (WR) P3.6 12 44 P1.4 (CEX1/SS) (RD) P3.7 19 5 P1.3 (CEX0) (RD) P3.7 13 43 P1.3 (CEX0) (XTAL2A) P4.7 20 4 P1.2 (ECI) (XTAL2A) P4.7 14 42 P1.2 (ECI) 3 (XTAL1A) P4.6 21 P1.1 (T2 EX/SS) (XTAL1A) P4.6 15 41 P1.1 (T2 EX/SS) VSS 22 2 P1.0 (T2/XTAL1B) VSS 16 40 P1.0 (T2/XTAL1B) (DDA) P4.3 17 39 P4.2 (XTAL2B) (DDA) P4.3 23 1 P4.2 (XTAL2B) (A8) P2.0 18 38 VCC (A8) P2.0 24 44 VCC (A9) P2.1 19 37 P0.0 (AD0) (A9) P2.1 25 43 P0.0 (AD0) (DAC-/A10) P2.2 20 36 P0.1 (AD1) (DAC-/A10) P2.2 26 42 P0.1 (AD1) (DAC+/A11) P2.3 21 35 P0.2 (AD2) (DAC+/A11) P2.3 27 41 P0.2 (AD2) (AIN0/A12) P2.4 22 34 P0.3 (AD3) (AIN0/A12) P2.4 28 40 P0.3 (AD3) (WR) P3.6 12 44 P1.4 (CEX1/SS) (RD) P3.7 13 43 P1.3 (CEX0) (XTAL2A) P4.7 14 42 P1.2 (ECI) (XTAL1A) P4.6 15 41 P1.1 (T2 EX/SS) GND 16 40 P1.0 (T2/XTAL1B) (DDA) P4.3 17 39 P4.2 (XTAL2B) (A8) P2.0 18 38 VDD (A9) P2.1 19 37 P0.0 (AD0) (DA-/A10) P2.2 20 36 P0.1 (AD1) (DA+/A11) P2.3 21 35 P0.2 (AD2) (AIN0/A12) P2.4 22 34 P0.3 (AD3)