Features High-performance Fully CMOS, Electrically-erasable Complex Programmable Logic Device 64 Macrocells 5.0 ns Pin-to-pin Propagation Delay Registered Operation up to 333 MHz Enhanced Routing Resources Optimized for 1.8V Operation 2 I/O Banks to Facilitate Multi-voltage I/O Operation: 1.5V, 1.8V, 2.5V, 3.3V High- SSTL2 and SSTL3 I/O Standards In-System Programming (ISP) Supported performance ISP Using IEEE 1532 (JTAG) Interface IEEE 1149.1 JTAG Boundary Scan Test CPLD Flexible Logic Macrocell D/T/Latch Configurable Flip-flops 5 Product Terms per Macrocell, Expandable up to 40 Global and Individual Register Control Signals ATF1504BE Global and Individual Output Enable Programmable Output Slew Rate with Low Output Drive Programmable Open Collector Output Option Maximum Logic Utilization by Burying a Register with a Combinatorial Output and Vice Versa Fully Green (RoHS Compliant) 10 A Standby Current Power Saving Option During Operation Using PD1 and PD2 Pins Programmable Pin-keeper Option on Inputs and I/Os Programmable Schmitt Trigger Option on Input and I/O Pins Programmable Input and I/O Pull-up Option Unused I/O Pins Can Be Configured as Ground (Optional) Available in Commercial and Industrial Temperature Ranges Available in 44-lead and 100-lead TQFP Advanced Digital CMOS Technology 100% Tested Completely Reprogrammable 10,000 Program/Erase Cycles 20-year Data Retention 2000V ESD Protection 200 mA Latch-up Immunity Security Fuse Feature Hot-Socketing Supported 3637BPLD1/08Enhanced Features Improved Connectivity (Additional Feedback Routing, Alternate Input Routing) Output Enable Product Terms Outputs Can Be Configured for High or Low Drive Combinatorial Output with Registered Feedback and Vice Versa within each Macrocell Three Global Clock Pins Fast Registered Input from Product Term Pull-up Option on TMS and TDI JTAG Pins OTF (On-the-Fly) Reconfiguration Mode DRA (Direct Reconfiguration Access) 1. Description The ATF1504BE is a high-performance, high-density complex programmable logic device (CPLD) that utilizes Atmels proven electrically-erasable memory technology. With 64 logic mac- rocells and up to 68 inputs, it easily integrates logic from several TTL, SSI, MSI, LSI and classic PLDs. The ATF1504BEs enhanced routing switch matrices increase usable gate count and the odds of successful pin-locked design modifications. The ATF1504BE has up to 64 bi-directional I/O pins and four dedicated input pins. Each dedi- cated input pin can also serve as a global control signal, register clock, register reset or output enable. Each of these control signals can be selected for use individually within each macrocell. Figures 1-1 and 1-2 show the pin assignments for the 100-lead and 44-lead TQFP packages respectively. 2 ATF1504BE 3637BPLD1/08