Features High-performance, Low-power Atmel AVR 8-bit Microcontroller Advanced RISC Architecture 133 Powerful Instructions Most Single Clock Cycle Execution 32 x 8 General Purpose Working Registers + Peripheral Control Registers Fully Static Operation Up to 16MIPS Throughput at 16MHz On-chip 2-cycle Multiplier High Endurance Non-volatile Memory segments 128Kbytes of In-System Self-programmable Flash program memory 4Kbytes EEPROM 4Kbytes Internal SRAM 8-bit Atmel Write/Erase cycles: 10,000 Flash/100,000 EEPROM (1) Data retention: 20 years at 85C/100 years at 25C Microcontroller Optional Boot Code Section with Independent Lock Bits In-System Programming by On-chip Boot Program with 128KBytes True Read-While-Write Operation Up to 64Kbytes Optional External Memory Space Programming Lock for Software Security In-System SPI Interface for In-System Programming QTouch library support Programmable Capacitive touch buttons, sliders and wheels QTouch and QMatrix acquisition Flash Up to 64 sense channels JTAG (IEEE std. 1149.1 Compliant) Interface Boundary-scan Capabilities According to the JTAG Standard Extensive On-chip Debug Support Programming of Flash, EEPROM, Fuses and Lock Bits through the JTAG Interface ATmega128 Peripheral Features Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes ATmega128L Two Expanded 16-bit Timer/Counters with Separate Prescaler, Compare Mode and Capture Mode Real Time Counter with Separate Oscillator Two 8-bit PWM Channels 6 PWM Channels with Programmable Resolution from 2 to 16 Bits Output Compare Modulator 8-channel, 10-bit ADC 8 Single-ended Channels 7 Differential Channels 2 Differential Channels with Programmable Gain at 1x, 10x, or 200x Byte-oriented Two-wire Serial Interface Dual Programmable Serial USARTs Master/Slave SPI Serial Interface Programmable Watchdog Timer with On-chip Oscillator On-chip Analog Comparator Special Microcontroller Features Power-on Reset and Programmable Brown-out Detection Internal Calibrated RC Oscillator External and Internal Interrupt Sources Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby, and Extended Standby Software Selectable Clock Frequency ATmega103 Compatibility Mode Selected by a Fuse Global Pull-up Disable I/O and Packages 53 Programmable I/O Lines 64-lead TQFP and 64-pad QFN/MLF Operating Voltages 2.7 - 5.5V ATmega128L 4.5 - 5.5V ATmega128 Speed Grades 0 - 8MHz ATmega128L Rev. 2467XAVR06/11 0 - 16MHz ATmega128ATmega128 Pin Configurations Figure 1. Pinout ATmega128 PEN 1 48 PA3 (AD3) RXD0/(PDI) PE0 2 47 PA4 (AD4) (TXD0/PDO) PE1 3 46 PA5 (AD5) (XCK0/AIN0) PE2 4 45 PA6 (AD6) (OC3A/AIN1) PE3 5 44 PA7 (AD7) (OC3B/INT4) PE4 6 43 PG2(ALE) (OC3C/INT5) PE5 7 42 PC7 (A15) (T3/INT6) PE6 8 41 PC6 (A14) (ICP3/INT7) PE7 9 40 PC5 (A13) (SS) PB0 10 39 PC4 (A12) (SCK) PB1 11 38 PC3 (A11) (MOSI) PB2 12 37 PC2 (A10) (MISO) PB3 13 36 PC1 (A9) (OC0) PB4 14 35 PC0 (A8) (OC1A) PB5 15 34 PG1(RD) (OC1B) PB6 16 33 PG0(WR) Note: The Pinout figure applies to both TQFP and MLF packages. The bottom pad under the QFN/MLF package should be soldered to ground. Overview The Atmel AVR ATmega128 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega128 achieves throughputs approaching 1MIPS per MHz allowing the system designer to optimize power consumption versus processing speed. 2 2467XAVR06/11 (OC2/OC1C) PB7 17 64 AVCC TOSC2/PG3 18 63 GND TOSC1/PG4 19 62 AREF RESET 20 61 PF0 (ADC0) VCC 21 60 PF1 (ADC1) GND 22 59 PF2 (ADC2) XTAL2 23 58 PF3 (ADC3) XTAL1 24 57 PF4 (ADC4/TCK) (SCL/INT0) PD0 25 56 PF5 (ADC5/TMS) (SDA/INT1) PD1 26 55 PF6 (ADC6/TDO) (RXD1/INT2) PD2 27 54 PF7 (ADC7/TDI) (TXD1/INT3) PD3 28 53 GND (ICP1) PD4 29 52 VCC (XCK1) PD5 30 51 PA0 (AD0) (T1) PD6 31 50 PA1 (AD1) (T2) PD7 32 49 PA2 (AD2)