Features High-performance, Low-power AVR 8-bit Microcontroller Advanced RISC Architecture 131 Powerful Instructions Most Single-clock Cycle Execution 32 x 8 General Purpose Working Registers Fully Static Operation Up to 16 MIPS Throughput at 16 MHz On-chip 2-cycle Multiplier High Endurance Non-volatile Memory segments 16K Bytes of In-System Self-programmable Flash program memory 512 Bytes EEPROM 8-bit 1K Bytes Internal SRAM Write/Erase cycles: 10,000 Flash/100,000 EEPROM Microcontroller (1) Data retention: 20 years at 85C/100 years at 25C Optional Boot Code Section with Independent Lock Bits with 16K Bytes In-System Programming by On-chip Boot Program True Read-While-Write Operation In-System Up to 64K Bytes Optional External Memory Space Programming Lock for Software Security JTAG (IEEE std. 1149.1 Compliant) Interface Programmable Boundary-scan Capabilities According to the JTAG Standard Extensive On-chip Debug Support Flash Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface Peripheral Features Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes Two 16-bit Timer/Counters with Separate Prescalers, Compare Modes, and ATmega162 Capture Modes Real Time Counter with Separate Oscillator ATmega162V Six PWM Channels Dual Programmable Serial USARTs Master/Slave SPI Serial Interface Programmable Watchdog Timer with Separate On-chip Oscillator On-chip Analog Comparator Special Microcontroller Features Power-on Reset and Programmable Brown-out Detection Internal Calibrated RC Oscillator External and Internal Interrupt Sources Five Sleep Modes: Idle, Power-save, Power-down, Standby, and Extended Standby I/O and Packages 35 Programmable I/O Lines 40-pin PDIP, 44-lead TQFP, and 44-pad MLF Operating Voltages 1.8 - 5.5V for ATmega162V 2.7 - 5.5V for ATmega162 Speed Grades 0 - 8 MHz for ATmega162V (see Figure 113 on page 266) 0 - 16 MHz for ATmega162 (see Figure 114 on page 266) 2513LAVR03/2013Pin Figure 1. Pinout ATmega162 Configurations PDIP (OC0/T0) PB0 VCC 1 40 (OC2/T1) PB1 PA0 (AD0/PCINT0) 2 39 (RXD1/AIN0) PB2 3 38 PA1 (AD1/PCINT1) (TXD1/AIN1) PB3 PA2 (AD2/PCINT2) 4 37 (SS/OC3B) PB4 PA3 (AD3/PCINT3) 5 36 (MOSI) PB5 PA4 (AD4/PCINT4) 6 35 (MISO) PB6 PA5 (AD5/PCINT5) 7 34 (SCK) PB7 PA6 (AD6/PCINT6) 8 33 RESET PA7 (AD7/PCINT7) 9 32 (RXD0) PD0 10 31 PE0 (ICP1/INT2) (TXD0) PD1 PE1 (ALE) 11 30 (INT0/XCK1) PD2 PE2 (OC1B) 12 29 (INT1/ICP3) PD3 PC7 (A15/TDI/PCINT15) 13 28 (TOSC1/XCK0/OC3A) PD4 14 27 PC6 (A14/TDO/PCINT14) (OC1A/TOSC2) PD5 PC5 (A13/TMS/PCINT13) 15 26 (WR) PD6 PC4 (A12/TCK/PCINT12) 16 25 (RD) PD7 PC3 (A11/PCINT11) 17 24 XTAL2 PC2 (A10/PCINT10) 18 23 XTAL1 PC1 (A9/PCINT9) 19 22 GND PC0 (A8/PCINT8) 20 21 TQFP/MLF 44 42 40 38 36 34 43 41 39 37 35 (MOSI) PB5 1 33 PA4 (AD4/PCINT4) (MISO) PB6 2 32 PA5 (AD5/PCINT5) (SCK) PB7 3 31 PA6 (AD6/PCINT6) RESET PA7 (AD7/PCINT7) 4 30 (RXD0) PD0 5 29 PE0 (ICP1/INT2) VCC 6 28 GND (TXD0) PD1 PE1 (ALE) 7 27 (INT0/XCK1) PD2 8 26 PE2 (OC1B) (INT1/ICP3) PD3 9 25 PC7 (A15/TDI/PCINT15) (TOSC1/XCK0/OC3A) PD4 10 24 PC6 (A14/TDO/PCINT14) (OC1A/TOSC2) PD5 PC5 (A13/TMS/PCINT13) 11 23 13 15 17 19 21 12 14 16 18 20 22 NOTE: MLF bottom pad should be soldered to ground. Disclaimer Typical values contained in this datasheet are based on simulations and characterization of other AVR microcontrollers manufactured on the same process technology. Min and Max values will be available after the device is characterized. 2 ATmega162/V 2513LAVR03/2013 (WR) PD6 PB4 (SS/OC3B) (RD) PD7 PB3 (TXD1/AIN1) XTAL2 PB2 (RXD1/AIN0) XTAL1 PB1 (OC2/T1) GND PB0 (OC0/T0) VCC GND (A8/PCINT8) PC0 VCC (A9/PCINT9) PC1 PA0 (AD0/PCINT0) (A10/PCINT10) PC2 PA1 (AD1/PCINT1) (A11/PCINT11) PC3 PA2 (AD2/PCINT2) (TCK/A12/PCINT12) PC4 PA3 (AD3/PCINT3)