Features High Performance, Low Power AVR 8-Bit Microcontroller Advanced RISC Architecture 123 Powerful Instructions Most Single Clock Cycle Execution 32 x 8 General Purpose Working Registers Fully Static Operation Non-volatile Program and Data Memories 2/4/8K Byte of In-System Programmable Program Memory Flash Endurance: 10,000 Write/Erase Cycles 8-bit 128/256/512 Bytes In-System Programmable EEPROM Endurance: 100,000 Write/Erase Cycles Microcontroller 128/256/512 Bytes Internal SRAM Data retention: 20 years at 85C / 100 years at 25 C with 2/4/8K Programming Lock for Self-Programming Flash Program & EEPROM Data Security Peripheral Features Bytes In-System 8/16-bit Timer/Counter with Prescaler 8/10-bit High Speed Timer/Counter with Separate Prescaler Programmable 3 High Frequency PWM Outputs with Separate Output Compare Registers Programmable Dead Time Generator Flash 10-bit ADC 11 Single-Ended Channels 16 Differential ADC Channel Pairs ATtiny261/V* 15 Differential ADC Channel Pairs with Programmable Gain (1x, 8x, 20x, 32x) On-chip Analog Comparator ATtiny461/V Programmable Watchdog Timer with Separate On-chip Oscillator Universal Serial Interface with Start Condition Detector ATtiny861/V Special Microcontroller Features debugWIRE On-chip Debug System In-System Programmable via SPI Port Summary External and Internal Interrupt Sources Low Power Idle, ADC Noise Reduction, Standby and Power-Down Modes Enhanced Power-on Reset Circuit Programmable Brown-out Detection Circuit *Mature Internal Calibrated Oscillator On-chip Temperature Sensor I/O and Packages 16 Programmable I/O Lines Available in 20-pin PDIP, 20-pin SOIC and 32-pad MLF Operating Voltage: 1.8 5.5V for ATtiny261V/461V/861V 2.7 5.5V for ATtiny261/461/861 Speed Grade: ATtiny261V/461V/861V: 0 4 MHz 1.8 5.5V, 0 10 MHz 2.7 5.5V ATtiny261/461/861: 0 10 MHz 2.7 5.5V, 0 20 MHz 4.5 5.5V Industrial Temperature Range Low Power Consumption Active Mode (1 MHz System Clock): 300 A 1.8V Power-Down Mode: 0.1 A at 1.8V 2588FSAVR06/2013ATtiny261/461/861 1. Pin Configurations Figure 1-1. Pinout ATtiny261/461/861 and ATtiny261V/461V/861V PDIP/SOIC (MOSI/DI/SDA/OC1A/PCINT8) PB0 1 20 PA0 (ADC0/DI/SDA/PCINT0) (MISO/DO/OC1A/PCINT9) PB1 2 19 PA1 (ADC1/DO/PCINT1) (SCK/USCK/SCL/OC1B/PCINT10) PB2 3 18 PA2 (ADC2/INT1/USCK/SCL/PCINT2) (OC1B/PCINT11) PB3 4 17 PA3 (AREF/PCINT3) VCC 5 16 AGND GND 6 15 AVCC (ADC7/OC1D/CLKI/XTAL1/PCINT12) PB4 7 14 PA4 (ADC3/ICP0/PCINT4) (ADC8/OC1D/CLKO/XTAL2/PCINT13) PB5 8 13 PA5 (ADC4/AIN2/PCINT5) (ADC9/INT0/T0/PCINT14) PB6 9 12 PA6 (ADC5/AIN0/PCINT6) (ADC10/RESET/PCINT15) PB7 10 11 PA7 (ADC6/AIN1/PCINT7) NC NC 1 24 (OC1B/PCINT11) PB3 2 23 PA2 (ADC2/INT1/USCK/SCL/PCINT2) PA3 (AREF/PCINT3) NC 3 22 VCC AGND 4 21 QFN/MLF GND 5 20 NC NC NC 6 19 (ADC7/OC1D/CLKI/XTAL1/PCINT12) PB4 18 AVCC 7 (ADC8/OC1D/CLKO/XTAL2/PCINT13) PB5 8 17 PA4 (ADC3/ICP0/PCINT4) Note: To ensure mechanical stability the center pad underneath the QFN/MLF package should be soldered to ground on the board. 2 2588FSAVR06/2013 9 32 PB2 (SCK/USCK/SCL/OC1B/PCINT10) NC PB1 (MISO/DO/OC1A/PCINT9) (ADC9/INT0/T0/PCINT14) PB6 10 31 PB0 (MOSI/DI/SDA/OC1A/PCINT8) (ADC10/RESET/PCINT15) PB7 11 30 12 29 NC NC NC (ADC6/AIN1/PCINT7) PA7 13 28 14 27 NC (ADC5/AIN0/PCINT6) PA6 PA0 (ADC0/DI/SDA/PCINT0) 15 26 (ADC4/AIN2/PCINT5) PA5 PA1 (ADC1/DO/PCINT1) NC 16 25