DSC1103/23
Low-Jitter Precision LVDS Oscillator
Features General Description
Low RMS Phase Jitter: <1 ps (typ.) The DSC1103 and DSC1123 series of high
performance oscillators utilizes a proven silicon MEMS
High Stability: 10 ppm, 25 ppm, 50 ppm
technology to provide excellent jitter and stability over
Wide Temperature Range:
a wide range of supply voltages and temperatures. By
- Ext. Industrial 40C to +105C
eliminating the need for quartz or SAW technology,
- Industrial 40C to +85C
MEMS oscillators significantly enhance reliability and
- Ext. Commercial 20C to +70C
accelerate product development, while meeting
stringent clock performance criteria for a variety of
High Supply Noise Rejection: 50 dBc
communications, storage, and networking applications.
Wide Frequency Range:
DSC1103 has a standby feature allowing it to
- 2.3 MHz 460 MHz
completely power-down when EN pin is pulled low. For
Small Industry Standard Footprints
DSC1123, only the outputs are disabled when EN is
- 2.5 mm x 2.0 mm
low. Both oscillators are available in industry standard
- 3.2 mm x 2.5 mm
packages, including the smallest 2.5 mm x 2.0 mm,
- 5.0 mm x 3.2 mm
and are drop-in replacements for standard 6-pin LVDS
- 7.0 mm x 5.0 mm crystal oscillators.
Excellent Shock and Vibration Immunity
Block Diagram
- Qualified to MIL-STD-883
High Reliability
- 20x better MTF than quartz-based devices
Pin 1 Pin 6
Low Current Consumption
Temp. Sensor &
Enable V
DD
Supply Range of 2.25V to 3.63V
Compensation
Circuitry
Standby and Output Enable Functions
Pin 2 Pin 5
Lead Free and RoHS-Compliant
NC Output
MEMS Divider
PLL
Oscillator Driver
Applications
Storage Area Networks
Pin 3
Pin 4
GND
Output
- SATA, SAS, Fibre Channel
Passive Optical Networks
- EPON, 10G-EPON, GPON, 10G-PON
HD/SD/SDI Video and Surveillance
PCI Express Gen 1/Gen 2/Gen 3
Display Port
2017 Microchip Technology Inc. DS20005745A-page 1DSC1103/23
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Supply Voltage .......................................................................................................................................... 0.3V to +4.0V
Input Voltage .......................................................................................................................................0.3V to V +0.3V
DD
ESD Protection (HBM) ...............................................................................................................................................4 kV
ESD Protection (MM) ................................................................................................................................................400V
ESD Protection (CDM) ............................................................................................................................................1.5 kV
Notice: Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at those or any other conditions above those indicated
in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended
periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
Specifications: V = 3.3V; T = +25C unless otherwise specified.
DD A
Parameters Sym. Min. Typ. Max. Units Conditions
Supply Voltage (Note 1)V 2.25 3.63 V
DD
DSC1103, EN pin low; all
0.095
outputs disabled.
Supply Current I mA
DD
DSC1123, EN pin low; all
20 22
outputs disabled.
10 Includes frequency
variations due to initial
25
Frequency Stability f ppm
tolerance, temp., and power
50
supply voltage.
Aging - First Year f 5 ppm One year at +25C
Y1
Year two and beyond at
Aging - After First Year f <1 ppm/yr
Y2+
+25C
5 ms T = +25C
Start-up Time (Note 2)t
SU
V 0.75 x V Input logic high
IH DD
Input Logic Levels V
V 0.25 x V Input logic low
IL DD
Output Disable Time (Note 3)t 5 ns
DA
5 ms DSC1103
Output Enable Time t
EN
20 ns DSC1123
Enable Pull-Up Resistor
R 40 k Pull-up resistor exist.
PU
(Note 4)
LVDS Outputs
Supply Current I 29 32 mA Output enabled, R = 100
DD L
Output Offset Voltage V 1.125 1.4 V R = 100 Differential
OS
Delta Offset Voltage V 50 mV
OS
Peak-to-Peak Output Swing V 350 mV Single-Ended
PP
Note 1: V pin should be filtered with a 0.1 F capacitor.
DD
2: t is time to 100 ppm stable output frequency after V is applied and outputs are enabled.
SU DD
3: See the Output Waveform section and the Test Circuit for more information.
4: Output is enabled if pad is floated or not connected.
DS20005745A-page 2 2017 Microchip Technology Inc.