MCP14E6/7/8 2.0A Dual High-Speed Power MOSFET Driver With Enable Features General Description High Peak Output Current: 2.0A (typical) The MCP14E6/7/8 devices are high-speed MOSFET drivers, capable of providing 2.0A of peak current. The Independent Enable Function for Each Driver dual inverting, dual non-inverting and complementary Output outputs are directly controlled from either TTL or Wide Input Supply Voltage Operating Range: CMOS (3V to 18V). These devices also feature low - 4.5V to 18V shoot-through current, fast rise/fall times and Low Shoot-Through/Cross-Conduction Current in propagation delays, which make them ideal for high Output Stage switching frequency applications. High Capacitive Load Drive Capability: The MCP14E6/7/8 devices operate from a 4.5V to 18V -t : 12 ns with 1000 pF load (typical) R single power supply and can easily charge and -t : 15 ns with 1000 pF load (typical) discharge 1000 pF of MOSFET gate capacitance. They F Short Delay Times: 45 ns (typical) provide low enough impedances, in both the ON and OFF states, to ensure the MOSFETs intended state Low Supply Current: will not be affected, even by large transients. - With Logic 1 Input/Enable 1 mA (typical) The additional control of the MCP14E6/7/8 outputs is - With Logic 0 Input/Enable 300 A (typical) allowed by the use of separate enable functions. The Latch-up Protected: Passed JEDEC JESD78A ENB A and ENB B pins are active-high and are Logic Input will Withstand Negative Swing, . The pins may be left floating internally pulled up to V DD up to 5V for standard operation. Space-Saving Packages: The MCP14E6/7/8 dual output, 2.0A driver family is - 8-Lead SOIC, PDIP, 6x5 DFN offered in both surface-mount and pin-through-hole o o C to +125 C temperature rating. packages with a -40 Applications The low thermal resistance of the thermally enhanced DFN package allows greater power dissipation Switch Mode Power Supplies capability for driving heavier capacitive or resistive Pulse Transformer Drive loads. Line Drivers These devices are highly latch-up resistant under any Motor and Solenoid Drive conditions within their power and voltage ratings. They are not subject to damage when up to 5V of noise spiking (of either polarity) occurs on the ground pin. The devices are fully latch-up protected when tested according to JEDEC JESD78A. All terminals are fully protected against Electrostatic Discharge (ESD), up to 4 kV (HBM) or 400V (MM). 2011 Microchip Technology Inc. DS25006A-page 1MCP14E6/7/8 Package Types MCP14E7 MCP14E7 MCP14E6 MCP14E6 MCP14E8 MCP14E8 PDIP, SOIC 6x5 DFN* ENB A 1 8 ENB B ENB B ENB B ENB B ENB B ENB B ENB A 1 8 2 OUT A OUT A OUT A IN A 7 IN A 2 7 OUT A OUT A OUT A EP 9 V V V GND V V V 3 6 DD DD DD 3 6 DD DD DD GND IN B 4 5 OUT B OUT B OUT B IN B 4 5 OUT B OUT B OUT B * Includes Exposed Thermal Pad (EP) see Table 3-1. (1) Functional Block Diagram V DD Inverting V DD Output Internal Pull-up Non-Inverting Enable 4.7 V Input Effective 4.7 V MCP14E6 Dual Inverting Input C = 20 pF MCP14E7 Dual Non-Inverting (Each Input) MCP14E8 One Inverting, One Non-Inverting GND Note 1: Unused inputs should be grounded. DS25006A-page 2 2011 Microchip Technology Inc.