MCP14E9/10/11
3.0A Dual High-Speed Power MOSFET Driver With Enable
Features General Description
High Peak Output Current: 3.0A (typical) The MCP14E9/10/11 devices are high-speed MOSFET
drivers, capable of providing 3.0A of peak current. The
Independent Enable Function for Each Driver
dual inverting, dual non-inverting and complementary
Output
outputs are directly controlled from either TTL or
Wide Input Supply Voltage Operating Range:
CMOS (3V to 18V). These devices also feature low
- 4.5V to 18V
shoot-through current, near matched rise/fall times and
Low Shoot-Through/Cross-Conduction Current in
propagation delays, which make them ideal for high
Output Stage
switching frequency applications.
High Capacitive Load Drive Capability:
The MCP14E9/10/11 devices operate from a 4.5V to
-t : 14 ns with 1800 pF load (typical)
R
18V single power supply and can easily charge and
-t : 17 ns with 1800 pF load (typical)
discharge 1800 pF of MOSFET gate capacitance. They
F
Short Delay Times: provide low enough impedances, in both the ON and
OFF states, to ensure the MOSFETs intended state
-t : 45 ns (typical)
D1
will not be affected, even by large transients.
-t : 45 ns (typical)
D2
The additional control of the MCP14E9/10/11 outputs is
Low Supply Current:
allowed by the use of separate enable functions. The
- With Logic 1 Input/Enable 1 mA (typical)
ENB_A and ENB_B pins are active-high and are
- With Logic 0 Input/Enable 300 A (typical)
. The pins may be left floating
internally pulled up to V
DD
Latch-up Protected: Passed JEDEC JESD78A
for standard operation.
Logic Input will Withstand Negative Swing,
The MCP14E9/10/11 dual output 3.0A driver family is
up to 5V
offered in both surface-mount and pin-through-hole
o o
Space-Saving Packages:
C to +125 C temperature rating.
packages with a -40
- 8-Lead SOIC, PDIP, 6x5 DFN The low thermal resistance of the thermally enhanced
DFN package allows greater power dissipation
capability for driving heavier capacitive or resistive
Applications
loads.
Switch Mode Power Supplies
These devices are highly latch-up resistant under any
Pulse Transformer Drive
conditions within their power and voltage ratings. They
Line Drivers
are not subject to damage when up to 5V of noise
Motor and Solenoid Drive spiking (of either polarity) occurs on the ground pin.
The devices are fully latch-up protected when tested
according to JEDEC JESD78A. All terminals are fully
protected against Electrostatic Discharge (ESD), up to
4 kV (HBM) or 400V (MM).
2011 Microchip Technology Inc. DS25005A-page 1MCP14E9/10/11
Package Types
MCP14E10 MCP14E10
MCP14E9 MCP14E9
MCP14E11 MCP14E11
PDIP, SOIC
6x5 DFN*
1 8
ENB_A ENB_B ENB_B ENB_B ENB_B ENB_B ENB_B
ENB_A 1 8
OUT A OUT A OUT A
2 7
IN A IN A 2 7 OUT A OUT A OUT A
EP
9
GND
V V V V V V
3 6 3 6
DD DD DD DD DD DD
GND
IN B 4 5 OUT B OUT B OUT B
OUT B
IN B45
OUT B OUT B
* Includes Exposed Thermal Pad (EP); see Table 3-1.
(1)
Functional Block Diagram
V
DD
Inverting
V
DD
Output
Internal
Pull-up
Non-Inverting
Enable
4.7V
Input
MCP14E9 Dual Inverting
Effective
4.7V
Input C = 20 pF MCP14E10 Dual Non-Inverting
(Each Input)
MCP14E11 One Inverting, One Non-Inverting
GND
Note 1: Unused inputs should be grounded.
DS25005A-page 2 2011 Microchip Technology Inc.