MCP3911 3.3V Two-Channel Analog Front End Features Description The MCP3911 is a 2.7V to 3.6V dual channel Analog Two Synchronous Sampling 16/24-bit Resolution Front End (AFE) containing two synchronous sampling Delta-Sigma A/D Converters Delta-Sigma Analog-to-Digital Converters (ADC), two 94.5 dB SINAD, -106.5 dBc Total Harmonic PGAs, phase delay compensation block, low-drift th harmonic), 111 dB Distortion (THD) (up to 35 internal voltage reference, modulator output block, SFDR for Each Channel Digital Offset and Gain Error Calibration registers and , DV 2.7V-3.6V AV DD DD high-speed 20 MHz SPI compatible serial interface. Programmable Data Rate Up to 125 ksps: The MCP3911 ADCs are fully configurable with - 4 MHz Maximum Sampling Frequency features, such as: 16/24-bit resolution, Oversampling Oversampling Ratio Up to 4096 Ratio (OSR) from 32 to 4096, gain from 1x to 32x, Ultra Low-Power Shutdown Mode with <2 A independent shutdown and Reset, dithering and auto- -122 dB Crosstalk Between the Two Channels zeroing. The communication is largely simplified with the one-byte long commands, including various continuous Low-Drift 1.2V Internal Voltage Reference: Read/Write modes that can be accessed by the Direct 7 ppm/C Memory Access (DMA) of an MCU with a separate Data Differential Voltage Reference Input Pins Ready pin that can be directly connected to an Interrupt High-Gain Programmable Gain Amplifier (PGA) Request (IRQ) input of an MCU. on Each Channel (up to 32V/V) The MCP3911 is capable of interfacing a large variety Phase Delay Compensation with 1 s Time of voltage and current sensors, including shunts, Resolution current transformers, Rogowski coils and Hall effect Separate Modulator Output Pins for Each sensors. Channel Package Type Separate Data Ready Pin for Easy Synchronization 20-Lead RESET 1 20 SDI Individual 24-Bit Digital Offset and Gain Error SSOP DV SDO DD 2 19 Correction for Each Channel AV 3 18 SCK DD CH0+ 4 17 CS High-Speed 20 MHz SPI Interface with Mode 0,0 5 CH0- 16 OSC2 and 1,1 Compatibility CH1- 6 15 OSC1/CLKI Continuous Read/Write Modes for Minimum 7 14 CH1+ DR Communication A 8 13 MDAT0 GND 9 12 REFIN+/OUT MDAT1 Low-Power Consumption (8.9 mW at 3.3V, D REFIN- 10 11 GND 5.6 mW at 3.3V in Low-Power mode, typical) Available in Small 20-Lead QFN and SSOP Packages, Pin-to-Pin Compatible with MCP3901 20-Lead 4x4 QFN* Extended Temperature Range: -40C to +125C 20 19 18 17 16 CH0+ 1 15 SCK Applications CS CH0- 2 14 EP Energy Metering and Power Measurement OSC2 CH1- 3 21 13 Automotive 12 OSC1/CLKI CH1+ 4 Portable Instrumentation 11 DR A 5 GND Medical and Power Monitoring 67 8 9 10 Audio/Voice Recognition *Includes Exposed Thermal Pad (EP) see Table 3-1. 2012-2021 Microchip Technology Inc. DS20002286E-page 1 REFIN+/OUT AV DD DV REFIN- DD D RESET GND MDAT1 SDI SDO MDAT0MCP3911 Functional Block Diagram AV DV DD DD REFIN/OUT Voltage VREFEXT AMCLK Xtal Oscillator OSC1 Reference MCLK Clock + V Generation OSC2 REF DMCLK/DRCLK REFIN- ANALOG DIGITAL VREF- VREF+ DMCLK OSR 2:0 PR 1:0 3 SINC + OFFCAL CH0 GAINCAL CH0 1 SINC 23:0 23:0 CH0+ + MOD 3:0 + X DATA CH0 CH0- 23:0 DR 6 PGA SDO Modulator Phase PHASE 11:0 ) Digital SPI Shifter RESET Interface OFFCAL CH1 GAINCAL CH1 SDI 23:0 23:0 CH1+ + SCK MOD 7:4 + X DATA CH1 CS CH1- 23:0 3 6 PGA SINC + 1 Modulator SINC MODOUT 1:0 DUAL 6 ADC Modulator MDAT0 MOD 7:0 Output Block MDAT1 POR POR AV DV DD DD Monitoring Monitoring A D GND GND DS20002286E-page 2 2012-2021 Microchip Technology Inc.