MO-9100A 1-80 MHz High Performance Oscillator Applications Features Any frequency between 1 and 80 MHz accurate to 6 decimal places Compu ng, storage, networking, telecom, industrial CMOS compa ble output control Ultra low phase ji er: 0.5 ps (12 kHz to 20 MHz) SATA, SAS, Ethernet, PCI Express, video, WiFi Industrial and extended commercial temperature ranges Standard 4-pin packages: 2.5 x 2.0, 3.2 x 2.5, 5.0 x 3.2, 7.0 x 5.0 mm Performance Speci ca ons Parameter and Condi ons Symbol Min. Typ. Max. Unit Condi on Output Frequency Range f 1 - 80 MHz Frequency Stability F stab -10 - +10 PPM Inclusive of Ini al tolerance at 25 C, and varia ons over opera ng temperature, aging, supply voltage and load -50 - +50 PPM First year Aging F aging -1.5 - +1.5 PPM 25C 10-year Aging -5 - +5 PPM 25C Opera ng Temperature T use -20 - +70 C Extended Commercial Range -40 - +85 C Industrial Supply Voltage Vdd 1.71 1.8 1.89 V Supply voltages between 2.5V and 3.3V are supported in increments of 0.1 V. Contact Vectron for guaranteed performance specs for supply voltages not speci ed in this table. 2.25 2.5 2.75 V 2.52 2.8 3.08 V 2.97 3.3 3.63 V Current Consump on Idd - 31 33 mA No load condi on, f = 20 MHz, Vdd = 2.5V, 2.8V or 3.3V - 29 31 mA No load condi on, f = 20 MHz, Vdd = 1.8V OE Disable Current I OD - - 31 mA Vdd = 2.5V, 2.8V or 3.3V, OE = GND, output is Weakly Pulled Down - - 30 mA Vdd = 1.8 V. OE = GND, output is Weakly Pulled Down Standby Current I std - - 70 A Vdd = 2.5V, 2.8V or 3.3V, ST = GND, output is Weakly Pulled Down -- 10 A Vdd = 1.8 V. ST = GND, output is Weakly Pulled Down Duty Cycle DC 45 - 55 % Rise/Fall Time Tr, Tf - 1.5 2 ns 15 pF load, 10% -90% Vdd - 3.6 - ns 30 pF load, 10% -90% Vdd - 4.6 - ns 45 pF load, 10% -90% Vdd Output Voltage High VOH 90% - - Vdd OH = -7 mA, IOL = 7 mA, (Vdd = 3.3V, 3.0V) IOH = -4 mA, IOL = 4 mA, (Vdd = 2.8V, 2.5V) IOH = -2 mA, IOL = 2 mA, (Vdd = 1.8V) Output Voltage Low VOL - - 10% Vdd Input Voltage High VIH 70% - - Vdd Pin 1, OE or ST Input Voltage Low VIL - - 30% Vdd Pin 1, OE or ST Input Pull-up Impedance Z in - 100 250 k Startup Time T start - 6 10 ms Measured from the me Vdd reaches its rated minimum value OE Enable/Disable Time T oe - - 150 ns f = 80 MHz, For other frequencies, T oe = 100 ns + 3 cycles Resume Time T resume - 6 10 ms Measured from the me ST pin crosses 50% threshold RMS Period Ji er T ji - 1.5 2 ps f = 75 MHz, Vdd = 2.5V, 2.8V or 3.3V - 2 3 ps f = 75 MHz, Vdd = 1.8V RMS Phase Ji er (random) T phj - 0.6 1 ps f = 10 MHz, Integra on bandwidth = 12 kHz to 20 MHz Page 1 of 5 Rev 1.3 Oct 2014 Vectron Interna onal 267 Lowell Road, Hudson, NH 03051 Tel: 1-88-VECTRON-1 h p://www.vectron.comTiming Diagrams 90% Vdd, 2.5/2,8/3.3V devices Vdd 95% Vdd, 1.8V devices Vdd Pin 4 Voltage ST Voltage 50% Vdd T start T resume CLK Output CLK Output T start: Time to start from power-o (ST/OE Mode) T resume: Time to resume from standby (ST Mode Only) Typical Performance Page 2 of 5 Rev 1.3 Oct 2014 Vectron Interna onal 267 Lowell Road, Hudson, NH 03051 Tel: 1-88-VECTRON-1 h p://www.vectron.com